LP87702 datasheet(36/98 Pages) TI

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bits to see if the converter is still in peak current regulation mode. During startup or output voltage ramp (output

voltage change has been programmed) no interrupt is generated.

If the load is so high that the output voltage decreases below a 350-mV level, the LP87702 device disables

the converter and sets the BUCKx_SC_INT bit. The interrupt is cleared when the host processor writes 1 to

BUCKx_SC_INT bit. Figure 7-12 shows the Buck overload situation.

Time

Voltage

VOUTx

350 mV

Time

Current

ILIMx

INT_BUCK(BUCKx_ILIM_INT)

20 µs

nINT

BUCK_STAT(BUCKx_STAT)

Resistive

pull-down

Regulator disabled by

digital

Host clearing the interrupt by writing to flags

New startup if

enable is valid

1 ms

INT_BUCK(BUCKx_SC_INT)

Figure 7-12. Buck Overload Situation

The boost converter has programmable output peak current limits. The limits are set with the BOOST_ILIM bits.

If the load current is increased so that the current limit is triggered, the converter continues to regulate to the limit

current level (current peak regulation). The voltage may decrease if the load current is higher than limit current. If

the current regulation continues for 64 µs, the LP87702 device sets the BOOST_ILIM_INT bit and pulls the nINT

pin low. The host processor can read the BOOST_ILIM_STAT bits to see if the converter is still in peak current

regulation mode.

If the load is so high that the output voltage decreases 150 mV (typical) below the input voltage level, then the

converter is disabled after 1 ms. If the output voltage decreases to 2.5 V, boost stops switching. After 1 ms the

deglitch time boost is fully disabled and the interrupt BOOST_SC_INT bit is set. The interrupt is cleared when

the host processor writes 1 to the BOOST_SC_INT bit. Figure 7-13 shows the Boost overload situation.

LP87702

SNVSBU3 – MARCH 2021

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