PCI1031 datasheet(21/100 Pages) TI

21 / 100 page

PCI1031

PCI-TO-PC CARD16 CONTROLLER UNIT

SCPS008B – FEBRUARY 1996 – REVISED DECEMBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

Table 5. ExCA Registers (Continued)

STATUS

CONTROL

MEMORY

WINDOW

I/O

WINDOW

ExCA

OFFSET

Memory window 3 start-address low byte

Memory window 3 start-address high byte

Memory window 3 end-address low byte

Memory window 3 end-address high byte

Memory window 3 offset-address low byte

Memory window 3 offset-address high byte

Reserved

Memory window 4 start-address low byte

Memory window 4 start-address high byte

Memory window 4 end-address low byte

Memory window 4 end-address high byte

Memory window 4 offset-address low byte

Memory window 4 offset-address high byte

I/O window 0 offset-address low byte

I/O window 0 offset-address high byte

I/O window 1 offset-address low byte

I/O window 1 offset-address high byte

Reserved

—

Reserved

Memory window 0–4 page

N/A†

† The memory window page register is mapped by the CardBus socket register/ExCA register base address register into PCI memory space.

TPS2206 PC Card power control interface

The attribute of PC Card technology that enables PC Cards to be inserted and removed in a system during run

time requires that power to the PC Card sockets be managed. The TI TPS2206 PC Card power switch performs

this duty by switching VCC and VPP to two card sockets under the control of the PCI1031. Another TI power

switch, the TPS2202A, also can be used. Both the TPS2206 and TPS2202A are pin compatible and provide

the same signaling interface to the PCI1031. The TPS2202A provides RESET and RESET pins that allow the

socket VCC and VPP to be shut down via external control from either system reset or a power supervisory device

in the system. References in this document to the TPS2206 apply identically to the TPS2202A device.

The PCI1031 and TPS2206 communicate via a 3-line serial interface called P2C (PCMCIA peripheral control).

This serial interface is a significant savings in pin count over the 8-line signaling convention. The P2C signaling

is transparent to host software; the PCI1031 generates the proper signal protocols when its internal VCC/VPP

control registers are written. Figure 3 illustrates the protocol used to communicate from the PCI1031 to

the TPS2206.

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