© VITESSE SEMICONDUCTOR CORPORATION

Page 3

10/12/98

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

VITESSE

SEMICONDUCTOR CORPORATION

Preliminary Data Sheet

VSC8150

2.488Gb/s SONET/SDH

Overhead Monitor

G52186-0, Rev. 3.0

Table 1: Frame Detection Select Settings

Figure 2: Frame Detection Patterns

Loss of Signal

A Loss of Signal (LOS active high) input is provided to prevent noise from propagating into the overhead

output logic. Logic zeros will be clocked into the device when LOS is active high, and SEF will be immediately

synchronously asserted, with LOF appearing 3ms afterward. If RXSCLKIN+/- disappears before LOS is

asserted the part will freeze and SEF/LOF will never appear.

Loss of Frame

A Loss of Frame (LOF) defect is declared (RXLOF active high) when a Severely Errored Frame (SEF)

condition persists for 3ms (R6-59). The LOF state detection is based on an integrating timer to prevent sporadic

errors from not asserting LOF, such as a periodic 1ms error. In the event of sporadic errors, the out of frame

timer increments when RXSEF = 1. It is on hold when RXSEF = 0 and does not change state as long as this

condition lasts for < 3 ms. The out of frame timer is reset to it’s initial state if the RXSEF is low for > 3 ms, and

an LOF defect is cancelled after an in-frame condition (RXSEF low) persists for a total of 3ms (R6-61).

Multiple SONET/SDH Rate Functionality

The VSC8150 supports three SONET/SDH rates: STS-48/STM-16, STS-12/STM-4, and STS-3/STM-1.

The user is responsible for rate-provisioning the device by setting the two inputs RATESEL[1:0] (See Table 2).

The device requires a clock rate appropriate to the selected data rate in order for internal circuitry to function

correctly. LOF integration timing is 3ms regardless of the rate selected.

Function

SELFRDET1

SELFRDET0

24 bits

1

0

48 bits

0

1

12 bits

0

0

Frame detection disabled

1

1

A1 (0xF6)

A1 (0xF6)

A1 (0xF6)

A2 (0x28)

A2 (0x28)

A2 (0x28)

48 bits

24 bits

12 bits