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TMS320F28375DPZP bảng dữ liệu(PDF) 164 Page - Texas Instruments

tên linh kiện TMS320F28375DPZP
Giải thích chi tiết về linh kiện  TMS320F2837xD Dual-Core Microcontrollers
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Trang chủ  http://www.ti.com
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The SPI operates in master or slave mode. The master initiates data transfer by sending the SPICLK signal. For
both the slave and the master, data is shifted out of the shift registers on one edge of the SPICLK and latched
into the shift register on the opposite SPICLK clock edge. If the CLOCK PHASE bit (SPICTL.3) is high, data is
transmitted and received a half-cycle before the SPICLK transition. As a result, both controllers send and receive
data simultaneously. The application software determines whether the data is meaningful or dummy data. There
are three possible methods for data transmission:
• Master sends data; slave sends dummy data
• Master sends data; slave sends data
• Master sends dummy data; slave sends data
The master can initiate a data transfer at any time because it controls the SPICLK signal. The software,
however, determines how the master detects when the slave is ready to broadcast data.
Figure 8-71 shows the SPI CPU Interface.
SPISIMO
SPISOMI
SPICLK
SPISTE
SPI
Low-Speed
Prescaler
DMA
PIE
LSPCLK
SYSCLK
SYSRS
SPIINT
SPITXINT
SPIRXDMA
SPITXDMA
CPU
PCLKCR8
GPIO
MUX
Bit
Clock
Figure 8-71. SPI CPU Interface
TMS320F28379D, TMS320F28379D-Q1, TMS320F28378D, TMS320F28377D
TMS320F28377D-Q1, TMS320F28376D, TMS320F28375D, TMS320F28374D
SPRS880O – DECEMBER 2013 – REVISED FEBRUARY 2021
www.ti.com
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Product Folder Links: TMS320F28379D TMS320F28379D-Q1 TMS320F28378D TMS320F28377D
TMS320F28377D-Q1 TMS320F28376D TMS320F28375D TMS320F28374D



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