16-Bit, 15 MSPS,

µModule Data Acquisition Solution

Data Sheet

ADAQ23875

Rev. 0

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FEATURES

Integrated fully differential ADC driver with signal scaling

Wide input common-mode voltage range

High common-mode rejection

Single-ended to differential conversion

±2.048 V input range with 4.096 V REFBUF

Critical passive components

0.005% precision matched resistor array for FDA

9 mm × 9 mm, 0.80 mm pitch, 100-ball CSP_BGA package

4× footprint reduction vs. discrete solution

Low power, dynamic power scaling, power-down mode

143 mW typical at 15 MSPS

Throughput: 15 MSPS, no pipeline delay

INL: ±0.6 LSB typical, ±1 LSB maximum

SINAD: 89 dB typical at 1 kHz

THD: −115 dB at 1 kHz, −106 dB at 400 kHz

Gain error: 0.005%FS typical

Gain error drift: ±1 ppm/°C maximum

On-board reference buffer with VCMO generation

Serial LVDS interface

Wide operating temperature range: −40°C to +85°C

APPLICATIONS

ATE

Data acquisition

Hardware in the Loop (HiL)

Power analyzers

Nondestructive test (acoustic emissions)

Mass spectrometry

Travelling wave fault location

Medical imaging and instruments

Ultrasonic flow meters

GENERAL DESCRIPTION

The ADAQ23875 is a precision, high speed, μModule® data

acquisition solution that reduces the development cycle of a

precision measurement systems by transferring the design

burden of component selection, optimization, and layout from

the designer to the device.

Using system-in-package (SIP) technology, the ADAQ23875

reduces end system component count by combining multiple

common signal processing and conditioning blocks in a single

device, solving many design challenges. These blocks include a

low noise, fully differential analog-to-digital converter (ADC)

driver (FDA), a stable reference buffer, and a high speed, 16-bit,

15 MSPS successive approximation register (SAR) ADC.

Using Analog Devices, Inc., iPassives® technology, the

ADAQ23875 also incorporates crucial passive components

with superior matching and drift characteristics to minimize

temperature dependent error sources and to offer optimized

performance (see Figure 1). The fast settling of the ADC driver

stage, with fully differential or single-ended to differential input

and no latency of the SAR ADC, provides a unique solution for

high channel count multiplexed signal chain architectures and

control loop applications.

The small footprint, 9 mm × 9 mm CSP_BGA package enables

smaller form factor instruments without sacrificing performance.

Single, 5 V supply operation is possible while achieving optimum

performance from the device. The ADAQ23875 features a serial

low voltage differential signaling (LVDS) digital interface with

one-lane or two-lane output modes, allowing the user to

optimize the interface data rate for each application. The

specified operation of the μModule is from −40°C to +85°C.

FUNCTIONAL BLOCK DIAGRAM

0.2µF

24.9Ω

15kΩ

24.9Ω

10µF

82pF

82pF

GND

PDB_ADC

VDD

REFBUF

REFIN

2

2.048V

REFERENCE

0.5

VCMO

VS+

0.1µF

VIO

CNV+, CNV–

DA+/DA–, DB+/DB–,

DCO+, DCO–

CLK+, CLK–

SERIAL LVDS

INTERFACE

IN–

IN–

IN+

IN+

+1.024V

–1.024V

0V

0V

–1V

–1V

0V

16-BIT, 15MSPS ADC

ADAQ23875

550Ω

550Ω

0.1µF

0.1µF

1.3pF

1.3pF

VS–

PDB_AMP

1.1kΩ

VCMO

1.1kΩ

FDA

IN–

IN+

+1.024V

–1.024V

+4V

+4V

+4V

IN–

IN+

EXAMPLE 1

EXAMPLE 2

EXAMPLE 3

+1.024V

–1.024V

–1V

0.1µF

0.1µF

Figure 1. ADAQ23875 Configured for Gain = 2, ±2.048 V Differential Input Range