MPC9456

MOTOROLA

TIMING SOLUTIONS

8

Figure 6. PCLK MPC9456 AC test reference for Vcc = 3.3V and Vcc = 2.5V

Differential

Pulse Generator

Z = 50

W

RT = 50Ω

ZO = 50Ω

RT = 50Ω

ZO = 50Ω

MPC9456 DUT

VCC – 2V

VTT

Figure 7. Output Transition Time Test Reference

Figure 8. Propagation delay (tPD) test reference

Figure 9. Output Duty Cycle (DC)

Figure 10. Output–to–output Skew tSK(O)

The pin–to–pin skew is defined as the worst case difference

in propagation delay between any similar delay path within a

single device

The time from the PLL controlled edge to the non controlled

edge, divided by the time between PLL controlled edges,

expressed as a percentage

VCC

VCCB2

GND

tP

T0

DC = tP/T0 x 100%

tF

tR

VCC=3.3V

VCC=2.5V

2.4

1.8V

0.55

0.6V

VCC

VCCB2

GND

VOH

VCCB2

GND

VCC

VCCB2

GND

t(LH)

PCLK

QX

PCLK

VCMR

VPP

t(HL)

tSK(LH)

tSK(HL)

Figure 11. Output Transition Time test reference

tF

tR

VCC=3.3V

VCC=2.5V

2.4

1.8V

0.55

0.6V

Freescale Semiconductor, Inc.

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