STM32WLE4JC datasheet(31/145 Pages) STMICROELECTRONICS

31 / 145 page

DS13105 Rev 8

31/145

STM32WLE5/E4xx

Functional overview

True random number

generator (RNG)

(10)

O(1

-R

AES hardware accelerator

-R

PKA hardware accelerator

-R

CRC calculation unit

-R

HSEM

-R

EXTI

O-

GPIOs

(11)

(12)

(13)

pins

(12)

1. Legend: Y = Yes (enabled). O = Optional (disabled by default and can be enabled by software). R = data retained.

- = Not available. Gray cells indicate wakeup capability.

2. The SRAM clock can be gated on or off.

3. Flash memory can be placed in power-down mode.

4. The SRAM2 content can optionally be retained when the PWR_CR3.RRS bit is set.

5. Only when the sub-GHz radio is active.

6. Some peripherals with wakeup from Stop capability can request HSI16 to be enabled. In this case, HSI16 is woken up by

the peripheral, and only feeds the peripheral that requested it. HSI16 is automatically put off when the peripheral does not

need it anymore.

7. HSE32 can be used by sub-GHz radio system.

8. USART reception is functional in Stop 0 and Stop 1 modes. LPUART1 reception is functional is Stop 0, Stop 1, and Stop 2

modes. LPUART1 generates a wakeup interrupt on Start address match or received frame event.

9. I2Cx (x= 1, 2) address detection is functional in Stop 0 and Stop 1 modes. I2C3 address detection is functional in Stop 0,

Stop 1 and Stop 2 modes. I2C3 generates a wakeup interrupt in case of address match.

10. Voltage scaling range 1 only.

11. I/Os can be configured with internal pull-up, pull-down or floating in Standby mode.

12. The I/Os with wakeup from Standby/Shutdown capability are PA0, PC13 and PB3.

13. I/Os can be configured with internal pull-up, pull-down or floating in Shutdown mode, but the configuration is lost when

exiting the Shutdown mode.

Table 7. Functionalities depending on system operating mode(1) (continued)

Peripheral

Stop 0

Stop 1

Stop 2

Standby Shutdown

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