STM32WLE4JC datasheet(109/145 Pages) STMICROELECTRONICS

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DS13105 Rev 8

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STM32WLE5/E4xx

Electrical characteristics

133

5.3.16

I/O port characteristics

General input/output characteristics

Unless otherwise specified, the parameters given in the table below are derived from tests

performed under the conditions summarized in Table 25: General operating conditions. All

I/Os are designed as CMOS- and TTL-compliant.

Table 72. I/O static characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL

I/O input low-level voltage(1)

1.8 V < VDD < 3.6 V

0.3 x VDD

I/O input low-level voltage(2)

0.39 x VDD

- 0.06

VIH

I/O input high-level voltage(1)

0.7 x VDD

I/O input high-level voltage(2)

0.49 x VDD

+ 0.26

Vhys

TT, FT_xx and NRST I/O

input hysteresis

200

Ilkg

FT_xx input leakage current

0 ≤ VIN ≤ Max(VDDXXX)(3)(4)

±100

Max(VDDXXX) ≤ VIN ≤

Max(VDDXXX) +1 V(2)(3)(4)

650

Max(VDDXXX) +1 V < VIN ≤

5.5 V(2)(3)(4)(5)(6)

200(7)

TT input leakage current

VIN ≤ Max(VDDXXX)(3)

±150

Max(VDDXXX) ≤ VIN < 3.6 V(3)

2000

RPU

Weak pull-up equivalent

resistor(1)

VIN = VSS

kΩ

RPD

Weak pull-down equivalent

resistor(1)

VIN = VDD

CIO

I/O pin capacitance

1. Tested in production.

2. Guaranteed by design, not tested in production.

3. Represents the pad leakage of the I/O itself. The total product pad leakage is given by

ITotal_Ileak_max = 10 μA + number of I/Os where VIN is applied on the pad x Ilkg(Max).

4. Max(VDDXXX) is the maximum value among all the I/O supplies.

5. VIN must be lower than [Max(VDDXXX) + 3.6 V].

6. Refer to the figure below.

7. To sustain a voltage higher than [Min(VDD, VDDA) + 0.3 V], the internal pull-up and pull-down resistors must be disabled on

all FT_xx I/O.

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