STM32L021D4 datasheet(29/114 Pages) STMICROELECTRONICS

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STM32L021x4

Functional overview

3.15.2

Low-power Timer (LPTIM)

The low-power timer has an independent clock and is running also in Stop mode if it is

clocked by LSE, LSI or an external clock. It is able to wakeup the devices from Stop mode.

This low-power timer supports the following features:

•

16-bit up counter with 16-bit autoreload register

•

16-bit compare register

•

Configurable output: pulse, PWM

•

Continuous / one shot mode

•

Selectable software / hardware input trigger

•

Selectable clock source

–

Internal clock source: LSE, LSI, HSI or APB clock

–

External clock source over LPTIM1 input (working even with no internal clock

source running, used by the Pulse Counter Application)

•

Programmable digital glitch filter

•

Encoder mode

3.15.3

SysTick timer

This timer is dedicated to the OS, but could also be used as a standard downcounter. It is

based on a 24-bit downcounter with autoreload capability and a programmable clock

source. It features a maskable system interrupt generation when the counter reaches ‘0’.

3.15.4

Independent watchdog (IWDG)

The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler. It is

clocked from an independent 37 kHz internal RC and, as it operates independently of the

main clock, it can operate in Stop and Standby modes. It can be used either as a watchdog

to reset the device when a problem occurs, or as a free-running timer for application timeout

management. It is hardware- or software-configurable through the option bytes. The counter

can be frozen in debug mode.

3.15.5

Window watchdog (WWDG)

The window watchdog is based on a 7-bit downcounter that can be set as free-running. It

can be used as a watchdog to reset the device when a problem occurs. It is clocked from

the main clock. It has an early warning interrupt capability and the counter can be frozen in

debug mode.

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