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TLE8457CSJ bảng dữ liệu(PDF) 17 Page - Infineon Technologies AG

tên linh kiện TLE8457CSJ
Giải thích chi tiết về linh kiện  LIN Transceiver with integrated voltage regulator
PDF  31 Pages
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nhà sản xuất  INFINEON [Infineon Technologies AG]
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Data Sheet
17
Rev. 1.1
2018-10-15
TLE8457C / TLE8457D
LIN Transceiver with integrated voltage regulator
General product characteristics
5
General product characteristics
5.1
Absolute maximum ratings
Notes
1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as ‘outside’ normal operating range. Protection functions are not
designed for continuous repetitive operation.
Table 3
Absolute maximum ratings voltages, currents and temperatures1)
All voltages with respect to ground; positive current flowing into pin; unless otherwise specified
1) Not subject to production test, specified by design.
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min.
Typ.
Max.
Voltage
Supply input voltage
VS
-0.3
–
45
V
LIN Spec 2.2A (Par. 11) P_5.1.1
Bus input voltage
VBUS
-27
–
40
V
–
P_5.1.2
Logic voltages at EN and TxD
Vlogic,in
-0.3
–
7.0
V
–
P_5.1.3
Logic voltages at RxD and NRST Vlogic,out
-0.3
–
VCC +
0.3
V–
P_5.1.4
Voltage regulator output
VCC
-0.3
–
7.0
V
–
P_5.1.5
Currents
Output current at RxD
IRxD
-15
–
15
mA –
P_5.1.6
Output current at NRST
INRST
––
10
mA –
P_5.1.7
Temperature
Junction temperature
Tj
-40
–
150
°C
–
P_5.1.8
Storage temperature
Ts
-55
–
150
°C
–
P_5.1.9
ESD susceptibility
Electrostatic discharge voltage
at VS and BUS vs. GND
VESD
-8
–
8
kV
Human body model
(100 pF via 1.5 kΩ)2)
2) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS-001 (1.5 kΩ, 100 pF).
P_5.1.10
Electrostatic discharge voltage
all other pins
VESD
-2
–
2
kV
Human body model
(100 pF via 1.5 kΩ)2)
P_5.1.11
Electrostatic discharge voltage
corner pins
VESD
-750
–
750
V
Charged device
model3)
3) ESD susceptibility, charged device model “CDM” EIA / JESD 22-C101 or ESDA STM5.3.1.
P_5.1.12
Electrostatic discharge voltage
at all other pins
VESD
-500
–
500
V
Charged device
model3)
P_5.1.13



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