công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

M24128X-FCU6/TF bảng dữ liệu(PDF) 11 Page - STMicroelectronics

tên linh kiện M24128X-FCU6/TF
Giải thích chi tiết về linh kiện  128-Kbit serial I²C bus EEPROM with configurable device address and software write protection, delivered in 4-ball CSP
PDF  35 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M24128X-FCU6/TF bảng dữ liệu(HTML) 11 Page - STMicroelectronics

Back Button M24128X-FCU6/TF Datasheet HTML 7Page - STMicroelectronics M24128X-FCU6/TF Datasheet HTML 8Page - STMicroelectronics M24128X-FCU6/TF Datasheet HTML 9Page - STMicroelectronics M24128X-FCU6/TF Datasheet HTML 10Page - STMicroelectronics M24128X-FCU6/TF Datasheet HTML 11Page - STMicroelectronics M24128X-FCU6/TF Datasheet HTML 12Page - STMicroelectronics M24128X-FCU6/TF Datasheet HTML 13Page - STMicroelectronics M24128X-FCU6/TF Datasheet HTML 14Page - STMicroelectronics M24128X-FCU6/TF Datasheet HTML 15Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 11 / 35 page
background image
6.1.2
Page write
The page write mode allows up to 32 bytes to be written in a single write cycle, provided they are all located in the
same page in the memory: that is, the most significant memory address bits, A15/A5, are the same. If more bytes
than those that will fit up to the end of the page are sent, a “roll-over” occurs, i.e. the bytes exceeding the page
end are written on the same page, from location 0.
The bus master sends from 1 to 32 bytes of data, each one is acknowledged by the device if the software write
protection is disabled with the SWP bit set to '0'. If the software write protection is enabled with the SWP bit set to
'1', the contents of the addressed memory location are not modified, and each data byte is followed by a NoACK,
as shown in Figure 6. After each transferred byte, the internal page address counter is incremented.
The transfer is terminated by the bus master generating a stop condition.
Figure 6. Write mode sequence with SWP bit = 1 (data write inhibited)
Byte Write
Byte addr
Data in
Page Write
Byte addr
Data in 1
Data in 2
Page Write (cont'd)
Data in N
ACK
ACK
ACK
NO ACK
R/W
ACK
ACK
ACK
NO ACK
R/W
NO ACK
NO ACK
Byte addr
Dev sel
Byte addr
Dev sel
M24128X-FCU
Write operations on memory array
DS12680 - Rev 2
page 11/35



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com