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BLUENRG-LP bảng dữ liệu(PDF) 9 Page - STMicroelectronics |
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BLUENRG-LP bảng dữ liệu(HTML) 9 Page - STMicroelectronics |
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9 / 72 page ![]() Figure 3. BlueNRG-LP RF block diagram Timer and Power control AGC AGC control RF control BLE controller BLE modulator BLE demodulator ADC ADC BP filter G G LNA RF1 PA PA ramp generator PLL LDO LDO LDO Max PA level Trimmed bias SMPS HSE Adjust Adjust VLXSD VFBSD VDDSD VSSSD VDDRF TX_SEQUENCE Interrupt Wakeup AHB APB See notes Notes: QFN42 and QFN48: VSS through exposed pad, and VSSRF pins must be connected to ground plane CSP49: VSSRF pins must be connected to ground plane. RX_SEQUENCE 1.6 Power supply management 1.6.1 SMPS step-down regulator The device integrates a step-down converter to improve low power performance when the VDD voltage is high enough. The SMPS output voltage can be programmed from 1.2 V to 1.90 V. It is internally clocked at 4 MHz or 8 MHz. The device can be operated without the SMPS by just wiring its output to VDD. This is the case for applications where the voltage is low, or where the power consumption is not critical. Except for the configuration SMPS OFF, an L/C BOM must be present on the board and connected to the VFBSD pad. BlueNRG-LP Power supply management DS13282 - Rev 2 page 9/72 |
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