A6986H datasheet(43/71 Pages) STMICROELECTRONICS

43 / 71 page

Application notes

7.1

Output voltage adjustment

The error amplifier reference voltage is 0.85 V typical.

The output voltage is adjusted accordingly as per equation below: (see Figure 42. A6986H application circuit).

VOUT=0.85⋅(1+R1R2)

(40)

Cr1 capacitor is sometimes useful to increase the small signal phase margin (please refer to

Section 6.5 Compensation network design).

Figure 42. A6986H application circuit

A6986H

Power GND

signal GND

Cr1

uC RST

RST

VCC

SS/INH

SYNCH

FSW

MLF

COMP

DELAY

SGND

PGND PGND

VIN

VBIAS

GND

VIN

VOUT

7.2

Switching frequency

A resistor connected to the FSW pin features the selection of the switching frequency. The pinstrapping is

performed at power-up, before the soft-start takes place. The FSW pin is pinstrapped and then driven floating in

order to minimize the quiescent current from VIN. Please refer to Table 6. fSW selection TJ = - 40 to 135 °C, VIN=

12 V unless otherwise specified. to identify the pull-up / pull-down resistor value. fSW = 250 kHz / fSW = 500 kHz

preferred codifications do not require any external resistor.

7.3

MLF pin

A resistor connected to the MLF pin features the selection of the between low noise mode / low consumption

mode and the different RST thresholds. The pinstrapping is performed at power-up, before the soft-start takes

place. The FSW pin is pinstrapped and then driven floating in order to minimize the quiescent current from VIN.

Please refer to Table 7. LNM/ LCM selection (A6986H3V3) TJ = - 40 to 135 °C, VIN = 12 V unless otherwise

specified., Table 8. LNM/ LCM selection (A6986H5V) TJ = -40 to 135 °C, VIN = 12 V unless otherwise specified.,

and Table 9. LNM/ LCM selection (A6986H) TJ = - 40 to 135 °C, VIN = 12 V unless otherwise specified. to identify

the pull-up / pull-down resistor value. (LNM, RST threshold 93%) / (LCM, RST threshold 93%) preferred

codifications don't require any external resistor.

7.4

Voltage supervisor

The embedded voltage supervisor (composed of the RST and the DELAY pins) monitors the regulated output

voltage and keeps the RST open collector output in low impedance as long as the VOUT is out of regulation. In

order to ensure a proper reset of digital devices with a valid power supply, the device can delay the RST assertion

with a programmable time.

A6986H

Application notes

DS12861 - Rev 3

page 43/71

A6986H bảng dữ liệu(PDF) 43 Page - STMicroelectronics

A6986H bảng dữ liệu(HTML) 43 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71

bảng dữ liệu tải về

Link URL