LTC6930 datasheet(14/28 Pages) AD

14 / 28 page

LTC6994-1/LTC6994-2

Rev. C

For more information www.analog.com

OPERATION

Figure 3. Rising-Edge Delayed Timing Diagram (LTC6994-1, POL = 0)

Figure 4. Falling-Edge Delayed Timing Diagram (LTC6994-1, POL = 1)

Edge-Controlled Delay

The LTC6994 is a programmable delay or pulse qualifier.

It can perform noise filtering, which distinguishes it from

a delay line (which simply delays all input transitions).

WhenthevoltageontheLTC6994inputpin(IN)transitions

low or high, the LTC6994 can delay the corresponding

output transition by any time from 1µs to 33.6 seconds.

LTC6994-1 Functionality

Figures3detailsthebasicoperationoftheLTC6994-1when

configured to delay rising edge transitions (POL = 0). A

rising edge on the IN pin initiates the timing. OUT remains

low for the duration of tDELAY. If IN stays high then OUT

will transition high after this time. If the input doesn’t

remain high long enough for OUT to transition high then

the timing will restart on each successive rising edge. In

this way, the LTC6994-1 can serve as a pulse qualifier,

filtering out noisy or short signals.

On a falling edge at the input, the output will follow im-

mediately (after a short propagation delay tPD).Note that

the output pulse width may be extremely short if IN falls

immediately after OUT rises.

Figure 4 details the operation of the LTC6994-1 when

configured to delay falling edges (POL = 1).

OUT

tDELAY

tPD

tDELAY

tPD

699412 F03

tWIDTH

tPD

OUT

tDELAY

tPD

tDELAY

tPD

tWIDTH

tDELAY

699412 F04

LTC6930 bảng dữ liệu(PDF) 14 Page - Analog Devices

LTC6930 bảng dữ liệu(HTML) 14 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

bảng dữ liệu tải về

Link URL