CS4210 datasheet(76/102 Pages) NSC

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4.4.19 Node ID and Status Register

This register contains the CSR address for the node on

which this chip resides. The 16-bit combination of busNum-

ber and nodeNumber is referred to as the Node ID. This

CS4210 with the value in CS4103’s base register at

Address 00h following the self-identification phase of bus

initialization. Although IntEvent.phyRegRcvd (BAR0+Offset

80h[26]) is not set when the contents of CS4103’s base

the IntEvent.selfIDComplete (BAR0+Offset 80h[16]) inter-

rupt to detect that the self-identification phase has com-

pleted and can then check for a new valid Node ID.

Table 4-34. BAR0+Offset E8h: Node ID and Status Register

Bit

Name

Access

Reset

Description

iDValid

ID Valid: This bit indicates whether or not the CS4210 has a valid node

number. It is cleared when the bus reset state is detected and set again

when the CS4210 receives a new node number from the CS4103.

If iDValid is clear, software should not set ContextControl.run for either of

the ATDMA contexts (request and response).

root

Root: This bit is set during the bus reset process if the CS4103 is root.

29:28

RSVD

Reserved

CPS

Cable Power Status: Set if the CS4103 is reporting that cable power status

is OK (VP 8V).

26:16

RSVD

Reserved

15:6

busNumber

RWU

3FFh

Bus Number: This number is used to identify the specific 1394 bus this

node belongs to when multiple 1394-compatible buses are connected via a

bridge. This field is set to 3FFh on a bus reset.

5:0

nodeNumber

Undef

Node Number: This number is the physical node number established by

the CS4103 during self-identification. It is automatically set to the value

received from the CS4103 after the self-identification phase. If the CS4103

sets the nodeNumber to 63, software should not set ContextControl.run for

either of the ATDMA contexts (request and response).

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