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LP8733 bảng dữ liệu(PDF) 26 Page - Texas Instruments

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tên linh kiện LP8733
Giải thích chi tiết về linh kiện  LP8733xx-Q1 Dual High-Current Buck Converter and Dual Linear Regulator
PDF  85 Pages
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nhà sản xuất  TI [Texas Instruments]
Trang chủ  http://www.ti.com
Logo TI - Texas Instruments

LP8733 bảng dữ liệu(HTML) 26 Page - Texas Instruments

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Time
Voltage
Ramp for Buck
BUCKx_CTRL2(SLEW_RATEx[2:0])
BUCKx_VSET /
LDOx_VSET
INT_BUCK(BUCKx_PG_INT) /
INT_LDO(LDOx_PG_INT)
nINT
Host clears
interrupt
Powergood
interrupt
Powergood
BUCK_STAT(BUCKx_STAT) /
LDO_STAT(LDOx_STAT)
1
Powergood
BUCK_STAT(BUCKx_PG_STAT) /
LDO_STAT(LDOx_PG_STAT)
Host clears
interrupt
Powergood
interrupt
1
0
1
0
1
0
1
0
1
0
BUCK_MASK(BUCKx_PGF_MASK)=0
BUCK_MASK(BUCKx_PGR_MASK)=0
LDO_MASK(LDOx_PGF_MASK)=0
LDO_MASK(LDOx_PGR_MASK)=0
26
LP8733-Q1
SNVSB64 – SEPTEMBER 2018
www.ti.com
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Copyright © 2018, Texas Instruments Incorporated
Figure 15. Regulator Output Voltage Change
During an LDO voltage change the internal reference for the Power-Good detection is also changed. For this
reason the Power Good may toggle during the LDO voltage change can indicate valid output even when the
output voltage is changing. This period takes less than 100 µs and after that time the Power Good gives correct
value.
7.3.6 Enable and Disable Sequences
The LP8733xx-Q1 device supports start-up and shutdown sequencing with programmable delays for different
regulator outputs using single EN control signal. The Buck regulator is selected for delayed control with:
•
BUCKx_EN = 1 in BUCKx_CTRL_1 register
•
BUCKx_EN_PIN_CTRL = 1 in BUCKx_CTRL_1 register
•
BUCKx_VSET[7:0] bits in BUCKx_VOUT register defines the voltage when EN pin is high
•
The delay from rising edge of EN pin to the regulator enable is set by BUCKx_STARTUP_DELAY[3:0] bits in
BUCKx_DELAY register and
•
The delay from falling edge of EN pin to the regulator disable is set by BUCKx_SHUTDOWN_DELAY[3:0] bits
in BUCKx_DELAY register.



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