PFS172-EY10 datasheet(8/92 Pages) PADAUK

8 / 92 page

PFS172

8bit MTP MCU with 8-bit ADC

Page 8 of 92

PDK-DS-PFS172-EN_V000-May 8, 2020

1. Features

1.1. Special Features

 General purpose series

 Not supposed to use in AC RC step-down powered or high EFT requirement applications.

PADAUK assumes no liability if such kind of applications can not pass the safety regulation tests.

 Operating temperature range: -20°C ~ 70°C

1.2. System Features

 2KW MTP program memory (programming cycle at least 1,000 times)

 128 Bytes data SRAM

 One hardware 16-bit timer

 Two hardware 8-bit timers with PWM generation

 One hardware comparator

 Bandgap circuit to provide 1.20V reference voltage

 Up to 12-channel 8-bit resolution ADC with one channel comes from intermal bandgap voltage

 Max. 14 IO pins with optional pull-high / pull-low resistor

 Every IO pin can be configured to enable wake-up function

 Clock sources: IHRC, ILRC and EOSC (XTAL)

 For every wake-up enabled IO, two optional wake-up speed are supported: normal and fast

 8 selectable levels of LVR reset from 1.8V to 4.5V

 Two selectable external interrupt pins by code option

1.3. CPU Features

 8-bit high performance RISC CPU

 86 powerful instructions

 Most instructions are 1T execution cycle

 Programmable stack pointer to provide adjustable stack level

 Direct and indirect addressing modes for data access. Data memories are available for use as an index

pointer of Indirect addressing mode

 IO register space and memory space are independent

1.4. Package Information

 PFS172-U06: SOT23-6 (60mil)

 PFS172-S08: SOP8 (150mil)

 PFS172-M10: MSOP10 (118mil)

 PFS172-EY10: ESSOP10 (150mil)

 PFS172-4N10: DFN3*3-10pin (0.5pitch)

 PFS172-S14: SOP14 (150mil)

 PFS172-S16A: SOP16 (150mil)

 PFS172-1J16A: QFN3*3-16pin (0.5pitch)

 PFS172-2J16A: QFN4*4-16pin (0.65pitch)

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