PFS172-EY10 datasheet(5/92 Pages) PADAUK

5 / 92 page

PFS172

8bit MTP MCU with 8-bit ADC

Page 5 of 92

PDK-DS-PFS172-EN_V000-May 8, 2020

6.10.

Port B Digital Input Enable Register (pbdier), IO address = 0x0e ..........................................64

6.11.

Port A Data Register (pa), IO address = 0x10 .......................................................................64

6.12.

Port A Control Register (pac), IO address = 0x11 .................................................................64

6.13.

Port A Pull-High Register (paph), IO address = 0x12 ............................................................64

6.14.

Port A Pull-Low Register (papl), IO address = 0x13 ..............................................................64

6.15.

Port B Data Register (pb), IO address = 0x15 .......................................................................64

6.16.

Port B Control Register (pbc), IO address = 0x16 .................................................................65

6.17.

Port B Pull-High Register (pbph), IO address = 0x17 ............................................................65

6.18.

Port B Pull-Low Register (pbpl), IO address = 0x18 ..............................................................65

6.19.

ADC Control Register (adcc), IO address = 0x20 ..................................................................65

6.20.

ADC Mode Register (adcm), IO address = 0x21 ...................................................................66

6.21.

ADC Result Register (adcr), IO address = 0x22 ....................................................................66

6.22.

MISC Register (misc), IO address = 0x26 .............................................................................66

6.23.

Comparator Control Register (gpcc), IO address = 0x2b .......................................................67

6.24.

Comparator Selection Register (gpcs), IO address = 0x2c ....................................................67

6.25.

Timer2 Control Register (tm2c), IO address = 0x30 ..............................................................68

6.26.

Timer2 Counter Register (tm2ct), IO address = 0x31 ............................................................68

6.27.

Timer2 Scalar Register (tm2s), IO address = 0x32................................................................68

6.28.

Timer2 Bound Register (tm2b), IO address = 0x33 ...............................................................69

6.29.

Timer3 Control Register (tm3c), IO address = 0x34 ..............................................................69

6.30.

Timer3 Counter Register (tm3ct), IO address = 0x35 ............................................................69

6.31.

Timer3 Scalar Register (tm3s), IO address = 0x36................................................................70

6.32.

Timer3 Bound Register (tm3b), IO address = 0x37 ...............................................................70

7. Instructions ......................................................................................................................... 71

7.1.

Data Transfer Instructions .....................................................................................................72

7.2.

Arithmetic Operation Instructions ..........................................................................................75

7.3.

Shift Operation Instructions ...................................................................................................77

7.4.

Logic Operation Instructions..................................................................................................78

7.5.

Bit Operation Instructions ......................................................................................................81

7.6.

Conditional Operation Instructions ........................................................................................82

7.7.

System control Instructions ...................................................................................................83

7.8.

Summary of Instructions Execution Cycle .............................................................................84

7.9.

Summary of affected flags by Instructions .............................................................................85

7.10.

BIT definition .........................................................................................................................85

8. Code Options ...................................................................................................................... 86

9. Special Notes ...................................................................................................................... 87

9.1.

Warning.................................................................................................................................87

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