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STM32F722IC bảng dữ liệu(PDF) 47 Page - STMicroelectronics |
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STM32F722IC bảng dữ liệu(HTML) 47 Page - STMicroelectronics |
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47 / 229 page ![]() DS11853 Rev 6 47/229 STM32F722xx STM32F723xx Functional overview 49 • Internal USB DMA • HNP/SNP/IP inside (no need for any external resistor) • For OTG/Host modes, a power switch is needed in case bus-powered devices are connected Universal Serial Bus controller on-the-go High-Speed PHY controller (USBPHYC) only on STM32F723xx devices. The USB HS PHY controller: – Sets the PHYPLL1/2 values for the PHY HS – Sets the other controls on the PHY HS – Controls and monitors the USB PHY’s LDO 3.31 Random number generator (RNG) All the devices embed an RNG that delivers 32-bit random numbers generated by an integrated analog circuit. 3.32 General-purpose input/outputs (GPIOs) Each of the GPIO pins can be configured by software as output (push-pull or open-drain, with or without pull-up or pull-down), as input (floating, with or without pull-up or pull-down) or as peripheral alternate function. Most of the GPIO pins are shared with digital or analog alternate functions. All GPIOs are high-current-capable and have speed selection to better manage internal noise, power consumption and electromagnetic emission. The I/O configuration can be locked if needed by following a specific sequence in order to avoid spurious writing to the I/Os registers. A Fast I/O handling allows a maximum I/O toggling up to 108 MHz. 3.33 Analog-to-digital converters (ADCs) Three 12-bit analog-to-digital converters are embedded and each ADC shares up to 16 external channels, performing conversions in the single-shot or scan mode. In the scan mode, an automatic conversion is performed on a selected group of analog inputs. Additional logic functions embedded in the ADC interface allow: • Simultaneous sample and hold • Interleaved sample and hold The ADC can be served by the DMA controller. An analog watchdog feature allows very precise monitoring of the converted voltage of one, some or all selected channels. An interrupt is generated when the converted voltage is outside the programmed thresholds. To synchronize A/D conversion and timers, the ADCs could be triggered by any of TIM1, TIM2, TIM3, TIM4, TIM5, or TIM8 timer. |
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