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PLM393LVDR bảng dữ liệu(PDF) 11 Page - Texas Instruments |
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PLM393LVDR bảng dữ liệu(HTML) 11 Page - Texas Instruments |
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11 / 29 page ![]() 11 LM393LV-Q1 www.ti.com SNOSDB3 – JUNE 2020 Product Folder Links: LM393LV-Q1 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Device Functional Modes (continued) Even with the fault tolerant feature, TI strongly recommends keeping the inputs within the specified input voltage range during normal system operation to maintain datasheet specifications. Operating outside the specified input range can cause changes in specifications such as propagation delay and input bias current, which can lead to unpredictable behavior. 9.4.3.3 Input Protection The input bias current is typically 1 pA for input voltages between VCC and GND. The comparator inputs are protected from reverse voltage by the internal ESD diodes connected to GND. As the input voltage goes under GND, or above the input Absolute Maximum ratings the protection diodes become forward biased and begin to conduct causing the input bias current to increase exponentially. Input bias current typically doubles for each 10°C temperature increase. If the inputs are to be connected to a low impedance source, such as a power supply or buffered reference line, TI recommends adding a current-limiting resistor in series with the input to limit any transient currents should the clamps conduct. The current should be limited 10 mA or less. This series resistance can be part of any resistive input dividers or networks. 9.4.4 ESD Protection The LV family incorporates internal ESD protection circuits on all pins. The inputs, and the open-drain output, use a proprietary "snapback" type ESD clamp from each pin to GND, which allows the pins to exceed the supply voltage (VCC). While shown as Zener diodes, snapback "short" and go low impedance (like an SCR) when the threshold is exceeded, as opposed to clamping to a defined voltage like a Zener. The open-drain output protection also consists of a ESD clamp between the output and GND to allow the output to be pulled above VCC to a maximum of 5.5V. If the inputs are to be connected to a low impedance source, such as a power supply or buffered reference line, TI recommends adding a current-limiting resistor in series with the input to limit any transient currents should the clamps conduct. The current should be limited 10 mA or less. This series resistance can be part of any resistive input dividers or networks. TI does not specify the performance of the ESD clamps and external clamping should be added if the inputs or output could exceed the maximum ratings as part of normal operation. 9.4.5 Unused Inputs If a channel is not to be used, DO NOT tie the inputs together. Due to the high equivalent bandwidth and low offset voltage, tying the inputs directly together can cause high frequency oscillations as the device triggers on it's own internal wideband noise. Instead, the inputs should be tied to any available voltage that resides within the specified input voltage range and provides a minimum of 50mV differential voltage. For example, one input can be grounded and the other input connected to a reference voltage, or even VCC (as long as the input is directly connected to the VCC pin to avoid transients). 9.4.6 Hysteresis The LV family does not have internal hysteresis. Due to the wide effective bandwidth and low input offset voltage, it is possible for the output to "chatter" (oscillate) when the absolute differential voltage near zero, as the comparator triggers on it's own internal wideband noise. TI recommends that the user add external hysteresis if slow moving signals are expected. See Hysteresis in the following section. |
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