LMX9820ASM datasheet(15/44 Pages) NSC

15 / 44 page

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7.0 Functional Description (Continued)

7.2 MEMORY

The LMX9820A includes 256KB of programmable Flash

memory that can be used for code and constant data. It

allows single-cycle read access from the CPU. In addition

to storing all algorithms and firmware, the on-board Flash

also contains the IEEE 802 compliant Media Access Con-

troller (MAC) address (BDADDR). The firmware and the

BDADDR are programmed by National Semiconductor or

can be programmed by the customer either before assem-

bly into the host system or in-system. Module firmware can

also be updated during manufacturing or in-system using

the ISP capabilities of the LMX9820A. The LMX9820A

firmware uses the internal RAM for buffers and program

variables.

7.3 CONTROL AND TRANSPORT PORT

The LMX9820A provides one Universal Asynchronous

Receiver Transmitter (UART). It supports 8-bit data formats

with or without parity and one or two stop bits. The baud

rate is generated by hardware that is programmed at boot

time. Alternatively, the speed and configuration settings

can be read out of internal memory settings. The UART

can operate at baud rates of 2.4k, 4.8k, 7.2k, 9.6k, 19.2k,

38.4k, 57.6k, 115.2k, 230.4k, 460.8k and 921.6k. It imple-

ments flow control logic (RTS, CTS) to provide hardware

handshaking capability. The UART offers wakeup from the

low-power modes through the multi-input wakeup module.

UART logic thresholds are set via the IOVCC pin.

7.4 AUXILIARY PORTS

7.4.1 Reset_5100 and Reset_b#

Reset_5100 and Reset_b# are active low reset inputs for

the baseband controller and digital smart radio portions of

the LMX9820A, respectively. These pins are normally tied

together and are connected to the host system so that the

host can initialize the LMX9820A by asserting the reset

inputs. Upon de-assertion, the status of the module operat-

ing

environment (Env)

pads

are

sampled

and

the

LMX9820A enters the corresponding operational mode.

7.4.2 Operating Environment Pads (Env0 and Env1)

The module provides two operating environments (see

Table 17) selected by the states on the Env inputs sampled

at reset.

The ISP mode allows end-of-line or field programming of

the LMX9820A Flash memory by starting the baseband

controller from the boot block of memory.

7.4.3 Interface Select Inputs (ISEL1, ISEL2)

The interface selection pads are used for setting the UART

speed and settings. If ISEL1 and ISEL2 are unconnected,

they are pulled high by weak internal pullups, which select

a default baudrate of 921.6k baud. The settings for Stop-

bits, Startbit, and Parity are stored as internal non-volatile

storage (NVS) parameters. If a baud rate different from the

values listed in Table 18 is needed, ISEL 1 and ISEL2 must

be pulled low. This forces the device to read the UART

speed from the parameter table in NVS. The default baud

rate value programmed in NVS is 9.6k baud, however the

device firmware can be modified to support other values.

The default configuration in NVS is 1 Stopbit, 1 Startbit, and

No parity. Table 18 shows the ISEL1 and ISEL2 selection

settings.

7.4.4 Module and LInk Status Outputs

The LMX9820A provides signals that the host can use to

determine the real-time status of the radio link. The

TX_Switch_P signal (pad H3) is a real-time indication of

the current configuration (direction) of the transceiver. The

link status lines (Lstat_0 and Lstat_1, pads E8 and F8,

respectively) are GPIO lines controlled by the LMX9820A

firmware. The Host Wakeup line (Host_wu, pad F9) is

implemented using GPIO and firmware. It is used to bring

the host processor out of Sleep mode when link activity

calls for host processing. Host_wu can also be used by the

host to check if link activity is present. If Host_wu is active,

then link activity is present and the host loses network

awareness if the operating system continues to allow the

host processor to enter Sleep mode. Table 19 presents the

definitions of the various module and link status outputs.

Table 17. Operating Environments

Operating Environment

Env1

(Pad B11)

Env0

(Pad E9)

ISP Mode

Run (Normal) Mode (De-

fault)

Table 18. UART Speed Selection

ISEL1

(Pad J13)

ISEL2

(Pad H13)

Interface

Speed (baud)

UART

Settings

921.6k

From NVS

115.2k

From NVS

9.6k

1Stop, 1Start,

No Parity

Check NVS

From NVS

Table 19. Module/Link Status Definitions

Mode

At least 1 SPP link es-

tablished

No active SPP link

Transceiver = Transmit

Transceiver = Receive

Host can Sleep

Wakeup host/host

should not Sleep

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