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VPN12AD02-FU bảng dữ liệu(PDF) 15 Page - Cyntec Co., Ltd. |
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VPN12AD02-FU bảng dữ liệu(HTML) 15 Page - Cyntec Co., Ltd. |
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15 / 22 page ![]() Rev. P05 15 VPN12AD02-FU Digital Dimming: The PWMI pin can be fed with a pulse width modulated (PWM) signals, this enables when HIGH and disables when LOW the gate drivers of the main switches. To avoid unwanted output overshoots due to not soft start assisted startups, PWM dimming in LOW state should not be used to suspend the output current for long time intervals. To stop in a safe manner EN/INUVLO=LOW can be used. Following shows the timing diagram of LED PWM dimming and start up behavior example. FIG.33 Timing Diagram LED Dimming and Start up behavior example Analog Dimming: The analog dimming feature SET pin can adjust the average load current level via the control of the feedback error Amplifier voltage (VFBH-FBL). The VSET range where analog dimming is enabled is from 200 mV to 1.5 V. The linear average output current can be adjusted by controlling the voltage at the SET pin between 0.2 V and 1.4 V. The mathematical relation is given as following equation. |
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