PC8245 datasheet(5/61 Pages) ATMEL

5 / 61 page

PC8245

2171D–HIREL–06/04

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Supports direct mode or chaining mode (automatic linking of DMA transfers)

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Supports scatter gathering — read or write discontinuous memory

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64-byte transfer queue per channel

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Interrupt on completed segment, chain, and error

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Local-to-local memory

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PCI-to-PCI memory

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Local-to-PCI memory

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PCI memory-to-local memory

Message unit

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Two doorbell registers

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Two inbound and two outbound messaging registers

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2O message interface

Two-wire interface controller with full master/slave support that accepts broadcast

messages

Embedded programmable interrupt controller (EPIC)

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Five hardware interrupts (IRQs) or 16 serial interrupts

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Four programmable timers with cascade

Two (dual) universal asynchronous receiver/transmitters (UARTs)

Integrated PCI bus and SDRAM clock generation

Programmable PCI bus and memory interface output drivers

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System level performance monitor facility

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Debug features

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Memory attribute and PCI attribute signals

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Debug address signals

–MIV signal: marks valid address and data bus cycles on the memory

bus

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Programmable input and output signals with watchpoint capability

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Error injection/capture on data path

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IEEE 1149.1 (JTAG)/test interface

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