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43 / 141 page  ST7DALI 43/141 POWER SAVING MODES (Cont’d) Similarities with Halt mode The following AWUFH mode behaviour is the same as normal Halt mode: – The MCU can exit AWUFH mode by means of any interrupt with exit from Halt capability or a re- set (see Section 9.4 HALT MODE). – When entering AWUFH mode, the I bit in the CC register is forced to 0 to enable interrupts. There- fore, if an interrupt is pending, the MCU wakes up immediately. – In AWUFH mode, the main oscillator is turned off causing all internal processing to be stopped, in- cluding the operation of the on-chip peripherals. None of the peripherals are clocked except those which get their clock supply from another clock generator (such as an external or auxiliary oscil- lator like the AWU oscillator). – The compatibility of Watchdog operation with AWUFH mode is configured by the WDGHALT option bit in the option byte. Depending on this setting, the HALT instruction when executed while the Watchdog system is enabled, can gen- erate a Watchdog RESET. Figure 28. AWUF Halt Timing Diagram AWUFH interrupt fCPU RUN MODE HALT MODE 256 OR 4096 tCPU RUN MODE fAWU_RC Clear by software tAWU 1 |
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