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CS6403 bảng dữ liệu(PDF) 42 Page - Cirrus Logic

tên linh kiện CS6403
Giải thích chi tiết về linh kiện  Echo-Cancelling Codec
PDF  54 Pages
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nhà sản xuất  CIRRUS [Cirrus Logic]
Trang chủ  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS6403 bảng dữ liệu(HTML) 42 Page - Cirrus Logic

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SSI
Mode 2 of the CS6403 requires that the far-end in-
put and output are provided to the CS6403 digitally
via the Synchronous Serial Interface (SSI). The ten
pin dual-row stake header J1 presents these signals
for easy access to a DSP serial port. See Figure 6
for pinout.
These signals are still available in Mode 1, however,
SDI will be driven by the MC145480 and care
should be taken to avoid contention on this pin if
anything is connected to the SSI.
Reset
The Reset button is used to reset the CS6403 to
a known state. The reset circuitry is intended to
perform a power-on reset function. The Schmitt-
trigger inverter corrects the sense of the RESET
signal for the CS6403 and debounces the switch.
Figure 7 shows the Reset circuit, as well as, the
EPLD and connected switches.
Algorithm Control
A bank of switches near the digital patch area al-
lows the user some control of the behavior of the
algorithms running on the CS6403. SW6 is la-
belled NORMAL and CLEAR and controls the
state of the coefficients in the echo canceller’s
adaptive filter.
SW2-5 are momentary contact
pushbutton switches which provide volume con-
trol and control of the half-duplex mode of the
CS6403.
In NORMAL mode the signal injected at FE_IN
will come out SPKROUT, be picked up by MI-
CIN, and transmitted to FE_OUT. The signal at
FE_OUT should be echo cancelled, that is, the
signal coupling at the near-end is substantially
attenuated at the far-end output. It will take a
few seconds of far-end speech, with the near-end
being quiet to converge the echo canceller. Until
then, a half-duplex mode is in place to prevent
howling and to hide the echoes present before
the echo canceller is converged.
If SW6 is moved to the CLEAR position, the co-
efficients in the adaptive filter will be cleared,
effectively disabling the echo canceller.
Note
that if the half-duplex mode is enabled (it is by
default), the CS6403 will be held in half-duplex
mode.
If half-duplex is disabled, the signal at
FE_OUT will be whatever is received at MICIN.
In order to disable the half-duplex mode, the
user need only push the HD OFF pushbutton
(SW5).
The four control buttons are momentary contact
buttons which change the state of operation of
the echo-canceller.
The "HD ON" button en-
ables the half-duplex fallback mode of the echo
canceller.
The "HD OFF" button disables the
half-duplex mode. Note that if the echo-cancel-
ler cannot provide enough echo suppression,
howling may occur with the half-duplex mode
disabled. "VOL UP" and "VOL DOWN" control
the output volume of the SPKROUT pins.
Pressing "VOL UP" will increase the volume by
one step and pressing "VOL DOWN" will de-
crease it. Volume may be raised to a level of 0
and down to 41.
GPOUT0 will go high for
125
µs (visible as a flash) if an attempt is made
to go out of the volume range.
The reset state of the CS6403 is half-duplex
mode enabled and volume level of 4.
SSYNC
SCLK
SDI
SDO
+5VD
RP1
47k
Ω
J1
AGND
Figure 6. Synchronous Serial Interface (SSI)
Stake Header
CDB6403
42
DS192DB3



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