TDC-GPX2 datasheet(54/77 Pages) AMSCO

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[v1-03] 2017-Dec-18

TDC-GPX2 − Detailed Description

FIFOs for Adapting Peak and Average Conversion

Rate

Each channel of GPX2 has a First-In-First-Out data buffer (FIFO).

Generally, GPX2 is capable of measuring the incoming stops

faster than the length of an output sequence. The FIFO is

capable of storing up to data of 16 stop events until the data

are read out. Up to a certain degree, the FIFO prevents rejection

of stop events for a short time when the input stop event rate

is higher than the read-out rate. But when the input data rate

is constantly higher than the read-out rate, then the FIFO gets

full and stop events are rejected. After a full FIFO was read out

and empty space is available for stop measurement further two

stops are needed to restart the FIFO (tFIFO_RESTART).

The maximum FIFO depth is 16, 8 or 4 stages, depending on the

HIGH_RESOLUTION configuration (off, 2x, 4x).

The following figures illustrate the typical dependencies

between stop event rate and the read out rate. They are

applicable for both SPI and LVDS readout. The INTERRUPT pin

indicates that the result is available for read-out through the

SPI interface. For SPI a continuous readout is assumed as long

as the interrupt is on low level. For LVDS output the FRAME

indicates the beginning of data output at SDO line. The

interrupt goes back to HIGH when all FIFOs are empty even if

output is LVDS. In the figures FIFO_DEPTH = 4 is assumed. The

FIFO LEVEL indicates the stop event buffered in the FIFO. A stop

event will increase FIFO LEVEL by one, reading out will decrease

the FIFO LEVEL.

Figure 57:

Input Stop Event Rate is Lower than the Readout Rate

• Enough time for complete readout of first stop before the

next stop event arises

• Interrupt goes back to high because the FIFO is empty

after read-out

• In this example, no stop events are rejected. All stops are

measured and read out

INTERRUPT

FRAME

STOP

SDO

FIFO LEVEL

Stop#1

Stop#2

Stop #3

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