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H5TC4G43BFR-RDA bảng dữ liệu(PDF) 21 Page - Hynix Semiconductor

tên linh kiện H5TC4G43BFR-RDA
Giải thích chi tiết về linh kiện  4Gb DDR3L SDRAM
PDF  33 Pages
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nhà sản xuất  HYNIX [Hynix Semiconductor]
Trang chủ  http://www.skhynix.com/kor/main.do
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H5TC4G43BFR-RDA bảng dữ liệu(HTML) 21 Page - Hynix Semiconductor

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Rev. 1.0 / Nov. 2013
21
Table 5 - IDD2N and IDD3N Measurement-Loop Patterna)
a) DM must be driven LOW all the time. DQS, DQS are MID-LEVEL.
b) DQ signals are MID-LEVEL.
Table 6 - IDD2NT and IDDQ2NT Measurement-Loop Patterna)
a) DM must be driven LOW all the time. DQS, DQS are MID-LEVEL.
b) DQ signals are MID-LEVEL.
Datab)
0
0
D1
0
0
0
0
0
0
0
0
0
0
-
1D
1
0
0
0
0
0
0
0
0
0
0
-
2D
11
1
1
0
0
0
0
0
F
0
-
3D
11
1
1
0
0
0
0
0
F
0
-
1 4-7
repeat Sub-Loop 0, use BA[2:0] = 1 instead
2 8-11
repeat Sub-Loop 0, use BA[2:0] = 2 instead
3 12-15
repeat Sub-Loop 0, use BA[2:0] = 3 instead
4 16-19
repeat Sub-Loop 0, use BA[2:0] = 4 instead
5 20-23
repeat Sub-Loop 0, use BA[2:0] = 5 instead
6 24-17
repeat Sub-Loop 0, use BA[2:0] = 6 instead
7 28-31
repeat Sub-Loop 0, use BA[2:0] = 7 instead
Datab)
0
0
D1
0
0
0
0
0
0
0
0
0
0
-
1D
1
0
0
0
0
0
0
0
0
0
0
-
2D
11
1
1
0
0
0
0
0
F
0
-
3D
11
1
1
0
0
0
0
0
F
0
-
1 4-7
repeat Sub-Loop 0, but ODT = 0 and BA[2:0] = 1
2 8-11
repeat Sub-Loop 0, but ODT = 1 and BA[2:0] = 2
3 12-15
repeat Sub-Loop 0, but ODT = 1 and BA[2:0] = 3
4 16-19
repeat Sub-Loop 0, but ODT = 0 and BA[2:0] = 4
5 20-23
repeat Sub-Loop 0, but ODT = 0 and BA[2:0] = 5
6 24-17
repeat Sub-Loop 0, but ODT = 1 and BA[2:0] = 6
7 28-31
repeat Sub-Loop 0, but ODT = 1 and BA[2:0] = 7



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