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SSM3K35CTC bảng dữ liệu(PDF) 2 Page - Toshiba Semiconductor |
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SSM3K35CTC bảng dữ liệu(HTML) 2 Page - Toshiba Semiconductor |
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2 / 9 page ![]() SSM3K35CTC 2 4. 4. 4. 4. Absolute Maximum Ratings (Note) (Unless otherwise specified, T Absolute Maximum Ratings (Note) (Unless otherwise specified, T Absolute Maximum Ratings (Note) (Unless otherwise specified, T Absolute Maximum Ratings (Note) (Unless otherwise specified, Taaaa = 25 = 25 = 25 = 25 )))) Characteristics Drain-source voltage Gate-source voltage Drain current Drain current (pulsed) Power dissipation Channel temperature Storage temperature (Note 1) (Note 1) (Note 2) Symbol VDSS VGSS ID IDP PD Tch Tstg Rating 20 ±10 250 600 500 150 -55 to 150 Unit V mA mW Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: Ensure that the channel temperature does not exceed 150 . Note 2: Device mounted on an FR4 board. (25.4 mm × 25.4 mm × 1.6 mm ,Cu pad: 645 mm2) Note: The MOSFETs in this device are sensitive to electrostatic discharge. When handling this device, the worktables, operators, soldering irons and other objects should be protected against anti-static discharge. Note: The channel-to-ambient thermal resistance, Rth(ch-a), and the drain power dissipation, PD, vary according to the board material, board area, board thickness and pad area. When using this device, be sure to take heat dissipation fully into account. 2017-12-04 Rev.3.0 ©2016-2017 Toshiba Electronic Devices & Storage Corporation |
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