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STM32WB55CC bảng dữ liệu(PDF) 137 Page - STMicroelectronics |
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STM32WB55CC bảng dữ liệu(HTML) 137 Page - STMicroelectronics |
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137 / 165 page ![]() DS11929 Rev 3 137/165 STM32WB55xx Electrical characteristics 152 Figure 25. Typical connection diagram using the ADC 1. Refer to Table 73: ADC characteristics for the values of RAIN, RADC and CADC. 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (refer to Table 68: I/O static characteristics for the value of the pad capacitance). A high Cparasitic value will downgrade conversion accuracy. To remedy this, fADC should be reduced. 3. Refer to Table 68: I/O static characteristics for the values of Ilkg. General PCB design guidelines Power supply decoupling should be performed as shown in Figure 13: Power supply scheme. The 10 nF capacitor should be ceramic (good quality) and it should be placed as close as possible to the chip. 6.3.21 Voltage reference buffer characteristics Table 79. VREFBUF characteristics(1) Symbol Parameter Conditions Min Typ Max Unit VDDA Analog supply voltage Normal mode VRS = 0 2.4 - 3.6 V VRS = 1 2.8 - 3.6 Degraded mode(2) VRS = 0 1.65 - 2.4 VRS = 1 1.65 - 2.8 VREFBUF_ OUT Voltage reference output Normal mode VRS = 0 2.046(3) 2.048 2.049(3) VRS = 1 2.498(3) 2.5 2.502(3) Degraded mode(2) VRS = 0 VDDA-150 mV - VDDA VRS = 1 VDDA-150 mV - VDDA TRIM Trim step resolution - - - ±0.05 ±0.1 % CL Load capacitor - - 0.5 1 1.5 µF esr Equivalent series resistor of Cload -- - - 2 Ω Iload Static load current -- - - 4 mA |
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