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STM32WB55CC bảng dữ liệu(PDF) 130 Page - STMicroelectronics |
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STM32WB55CC bảng dữ liệu(HTML) 130 Page - STMicroelectronics |
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130 / 165 page ![]() Electrical characteristics STM32WB55xx 130/165 DS11929 Rev 3 2. The I/O analog switch voltage booster is enabled when VDDA < 2.4 V (BOOSTEN = 1 in the SYSCFG_CFGR1 when VDDA < 2.4V). It is disabled when VDDA ≥ 2.4 V. 3. Fast channels are PC0, PC1, PC2, PC3, PA0, PA1. 4. Slow channels are all ADC inputs except the fast channels. Table 75. ADC accuracy - Limited test conditions 1(1)(2)(3) Symbol Parameter Conditions(4) Min Typ Max Unit ET Total unadjusted error Single ended Fast channel (max speed) TBD TBD TBD LSB Slow channel (max speed) TBD TBD TBD Differential Fast channel (max speed) TBD TBD TBD Slow channel (max speed) TBD TBD TBD EO Offset error Single ended Fast channel (max speed) TBD TBD TBD Slow channel (max speed) TBD TBD TBD Differential Fast channel (max speed) TBD TBD TBD Slow channel (max speed) TBD TBD TBD EG Gain error Single ended Fast channel (max speed) TBD TBD TBD Slow channel (max speed) TBD TBD TBD Differential Fast channel (max speed) TBD TBD TBD Slow channel (max speed) TBD TBD TBD ED Differential linearity error Single ended Fast channel (max speed) TBD TBD TBD Slow channel (max speed) TBD TBD TBD Differential Fast channel (max speed) TBD TBD TBD Slow channel (max speed) TBD TBD TBD |
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