VSP2272

SLES020 – DECEMBER 2001

5

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4 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±0.1 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±0.1 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Digital input voltage

–0.3 V to 5.3 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Analog input voltage

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input current (any leads except supplies)

±10 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating temperature

–25

°C to 85°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature

–55

°C to 125°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Junction temperature

150

°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature (soldering, 5 sec)

260

°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package temperature (IR reflow, peak, 10 sec)

235

°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

PARAMETER

TEST CONDITIONS

VSP2272Y, VSP2272M

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Resolution

12

Bits

Maximum conversion rate

28

MHz

DIGITAL INPUTS

Logic family

TTL

VT+

Input low-to-high threshold voltage

1.7

V

VT–

Input high-to-low threshold voltage

1

V

IIH

Input logic high current

VI = 3 V

±20

µA

IIL

Input logic low current

VI = 0 V

±20

µA

ADCCK clock duty cycle

50%

Input capacitance

5

pF

Maximum input voltage

– 0.3

5.3

V

DIGITAL OUTPUTS

Logic family

CMOS

Logic coding

Straight binary

VOH

Output logic high voltage

IOH = –2 mA

2.4

V

VOL

Output logic low voltage

IOL = 2 mA

0.4

V

J[1:0] = 00

0

Additional output data delay

J[1:0] = 01

5

ns

Additional output data delay

J[1:0] = 10

10

ns

J[1:0] = 11

13

REFERENCE

Positive reference voltage

1.75

V

Negative reference voltage

1.25

V

ANALOG INPUT (CCDIN)

Input signal level for full-scale out

PGA gain = 0 dB

900

mV

Input capacitance

15

pF

Input limit

–0.3

3.3

V