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IP178G bảng dữ liệu(PDF) 38 Page - List of Unclassifed Manufacturers

tên linh kiện IP178G
Giải thích chi tiết về linh kiện  8 Port 10/100 Ethernet Integrated Switch
PDF  76 Pages
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nhà sản xuất  ETC2 [List of Unclassifed Manufacturers]
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IP178G bảng dữ liệu(HTML) 38 Page - List of Unclassifed Manufacturers

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IP178G
Data Sheet
38 / 76
December 19, 2012
Copyright © 2012, IC Plus Corp.
IP178G-DS-R01.3
PHY
MII
R/W
Description
Default
Status Register
0~7
1.2
RO
LL
Link Status
1 = Link Pass
0 = Link Fail
When read as logic 1, indicates that IP178G has determined a valid
link has been established. When read as logic 0, indicates the link is
not valid. This bit is cleared until a valid link has been established
and before reading the contents of this registers.
0
0~7
1.1
RO
LH
Jabber Detect
1 = jabber condition detected
0 = no jabber condition detected
When read as logic 1, indicates that IP178G has detected a jabber
condition. This bit is always 0 for 100Mbps operation and is cleared
after IP178G reset. When the duration of TXEN exceeds the jabber
timer (21ms), the transmission and loop back functions will be
disabled and the COL is active. After TXEN goes low for more than
500 ms, the transmitter will be re-enabled.
0
0~7
1.0
RO
Extended capability
1 = Extended register capabilities
0 = No extended register capabilities
IP178G has extended register capabilities.
1
PHY
MII
R/W
Description
Default
PHY Identifier 1 Register
0~7
2
RO
IP178G OUI (Organizationally Unique Identifier) ID, the MSB is 3
rd
bit of IP178G OUI ID, and the LSB is 18
th bit of IP178G OUI ID.
IP178G OUI is 0090C3.
16’h0243
PHY
MII
R/W
Description
Default
PHY Identifier 2 Register
0~7 3[15:10]
RO
PHY identifier
IP178G OUI ID, the MSB is 19
th bit of IP178G OUI ID, and LSB is
24
th bit of IP178G OUI ID.
6’h03
0~7
3[9:4]
RO
Manufacture’s Model Number
IP178G model number
6’h18
0~7
3[3:0]
RO
Revision Number
IP178G revision number
0
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