GPC71PXXXA

© Generalplus Technology Inc.

Proprietary & Confidential

12

Dec. 20, 2016

Version: 1.2

9 APPLICATION CIRCUITS

9.1 Light Loading and Circuit without Noise

VDD

PVDD

PVSS

AUDP

IOA[3:0]

AUDN

IOA[3:0]

IOB[3:0]

IOB[3:0]

IOC[3:0]

IOC[3:0]

IOD[3:0]

IOD[3:0]

PVDD

PVSS

VDDIO

VSS

VSS1

REGOUT

NC

VSS2

VSS

Battery

PVDD

PVSS

0.1u

C1

VDD

VPP

VPP

VDDTRM

NC

TEST

NC

PCB Layout Guidelines:

1. PVDD may be greater than or equal to VDD.

2. VSS, PVSS must be connected to ground input directly, not the branch of each other.

3. When using two batteries, 0.1uF ~ 4.7uF is suggested for C1, and it should be increased in a high volume application.

4. IOC/IOD isn

’t supported in GPC71P032A/GPC71P016A.

5. There is no

“TEST” pin in GPC71P032A/GPC71P016A.