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MSM80C49 bảng dữ liệu(PDF) 17 Page - OKI electronic componets |
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MSM80C49 bảng dữ liệu(HTML) 17 Page - OKI electronic componets |
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17 / 20 page ![]() 17/20 ¡ Semiconductor MSM80C48/49/50, MSM80C35/39/40 4.2 Cancellation of software power-down mode The power-down mode status outlined above in examples 1 to 6 can be cancelled by using either the interrupt pin or the RESET pin. (1) Use of the INT pin during external interrupt enable mode (i.e. following execution of EN I instruction). m The clock generator is activated and the CPU is started up when a "0" level is applied to the INT pin. If this "0" level is maintained until the occurrence of at least 2 ALE output signals, an external interrupt is generated, and execution proceeds from address 3. If, however, the power-down is entered during the interrupt processing routine, execution resumes just after the power-down instruction. (2) Use of the INT pin during external interrupt disable mode (i.e. following execution of DIS I instruction or hardware reset) m The clock generator is activated and the CPU is started up when a "0" level is applied to the INT pin. When "0" level is maintained until the occurrence of at least 2 ALE output signals, execution is resumed just after the power-down instruction. (3) Use of the RESET pin m The clock generator is activated and the CPU started up when a "0" level is applied to the RESET pin. If this "0" level is maintained until the occurrence of at least 2 ALE output signals, the CPU is reset and execution proceeds from address 0. In case cancellation is done in oscillation stop mode, the "0" level must be input to the RESET pin until oscillation is stabilized. |
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