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SYNPWM bảng dữ liệu(PDF) 16 Page - Feeling Technology Corp. |
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SYNPWM bảng dữ liệu(HTML) 16 Page - Feeling Technology Corp. |
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16 / 57 page ![]() FM8P73B Web site: http://www.feeling-tech.com.tw Rev1.0 Nov 20, 2013 P.16/FM8P73B FEELING TECHNOLOGY 2.1.8 Timer3: 8-bit Timer The Timer3 is an 8-bit down-count timer which include latch register. Please refer to 2.3 for detail Timer description. 2.1.8.1 T3CON (Timer3 Control Register) Address Name B7 B6 B5 B4 B3 B2 B1 B0 22h (r/w) T3CON T3EN T3LOAD T3SO1 T3SO0 T3EDG T3PS2 T3PS1 T3PS0 T3EN : TMR3 Enable/Disable = 1, TMR3 Enable. = 0, TMR3 Disable. T3LOAD : Enable/Disable Latch Buffer automatically load to counter register while writing to latch register = 1, Enable TMR3 latch buffer automatically load to counter register while writing to latch register. = 0, Disable TMR3 latch buffer automatically load to counter register while writing to latch register. Note: This bit is only affected after latch register written. When the timer underflows, the latch register data will automatically load into counter register. T3SO1:T3SO0 : TMR3clock source selection T3SO1 T3SO0 TMR3clock source 0 0 TMCKI(IOB2) 0 1 Internal instruction clock cycle 1 0 Fosc 1 1 No function, don’t use T3EDG : TMR3 clock edge selection. This bit works only when external clock source TMCKI (IOB2) selected. = 1, TMR3 increased on falling edge of TMCKI pin. = 0, TMR3 increased on rising edge of TMCKI pin. T3PS2:T3PS0 : TMR3 Prescaler selection T3PS2 : T3PS0 TMR3 Prescal rate 0 0 0 1:1 0 0 1 1:2 0 1 0 1:4 0 1 1 1:8 1 0 0 1:16 1 0 1 1:32 1 1 0 1:64 1 1 1 1:128 2.1.8.2 T3LA (Timer3 Latch Register) Address Name B7 B6 B5 B4 B3 B2 B1 B0 24h (r/w) T3LA 8-bit real-time timer Latch T3LA is a Timer3 pre-set latch buffer, see 2.3 for detail description. |
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