SYNPWM datasheet(39/57 Pages) FEELING

39 / 57 page

FM8P73B

Web site: http://www.feeling-tech.com.tw

Rev1.0 Nov 20, 2013

P.39/FM8P73B

FEELING

TECHNOLOGY

BTRSC

Test Bit in R, Skip if Clear

Syntax:

BTRSC R, b

Operands:

 R  0x6F

 b  7

Operation:

Skip if R<b> = 0

Status Affected:

None

Description:

If bit ‘b’ in register ‘R’ is 0 then the next instruction is skipped.

If bit ‘b’ is 0 then next instruction fetched during the current instruction execution is

discarded, and a NOP is executed instead making this a 2-cycle instruction.

Cycles:

1/2

BTRSS

Test Bit in R, Skip if Set

Syntax:

BTRSS R, b

Operands:

 R  0x6F

 b  7

Operation:

Skip if R<b> = 1

Status Affected:

None

Description:

If bit ‘b’ in register ‘R’ is ‘1’ then the next instruction is skipped.

If bit ‘b’ is ‘1’, then the next instruction fetched during the current instruction execution, is

discarded and a NOP is executed instead, making this a 2-cycle instruction.

Cycles:

1/2

CALL

Subroutine Call

Syntax:

CALL I

Operands:

 I  0x3FF

Operation:

PC + 1  Top of Stack,

I  PC<9:0>

Status Affected:

None

Description:

Subroutine call. First, return address (PC+1) is pushed onto the stack. The 10-bit

immediate address is loaded into PC bits <9:0>.

Cycles:

CLRA

Clear ACC

Syntax:

CLRA

Operands:

None

Operation:

00h  ACC;

1  Z

Status Affected:

Description:

The ACC register is cleared. Zero bit (Z) is set.

Cycles:

CLRR

Clear R

Syntax:

CLRR R

Operands:

 R  0x6F

Operation:

00h  R;

1  Z

Status Affected:

Description:

The contents of register ‘R’ are cleared and the Z bit is set.

Cycles:

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