MSM5299C

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FUNCTIONAL DESCRIPTION

Pin Functional Description

• ER, EL

Pin

Input/Output

SHL

Description

Input pin to ENABLE F/F of MSM5299C.

Output pin of ENABLE F/F. EL is connected to next MSM5299C's

ER when MSM5299Cs are connected in series (cascade

connection).

Input pin to ENABLE F/F of MSM5299C.

Output pin of ENABLE F/F. ER is connected to next MSM5299C's

EL when MSM5299Cs are connected in series (cascade

connection).

L

H

Input

Output

Input

Output

ER

EL

EL

ER

When a single MSM5299C device is used, ER (EL) should be set at "L" level.

When a cascade connection is required, set the first MSM5299C's ER (EL) pin at "L" level and

connect the next MSM5299C's EL (ER) pin to the further next MSM5299C's ER (EL) pin.

•CP

Clock pulse input pin for the 4-bit parallel shift register. The data is shifted to the 4-bit parallel

shift register at the falling edge of the clock pulse.

• SHL

ER and EL can be used as either an input pin or an output pin based on the H/L condition of

and the H/L condition of SHL are described in the table below.

SHL

L

H

Input

Output

Output

Input

ER

EL

Shift direction

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