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AD5544BCPZ-R2 bảng dữ liệu(PDF) 17 Page - Analog Devices |
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AD5544BCPZ-R2 bảng dữ liệu(HTML) 17 Page - Analog Devices |
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17 / 24 page ![]() Data Sheet AD5544/AD5554 Rev. H | Page 17 of 24 TRUTH TABLES Table 8. AD55441 Control Logic Truth Table CS CLK LDAC RS MSB2 Serial Shift Register Function3 Input Register Function DAC Register High X High High X No effect Latched Latched Low Low High High X No effect Latched Latched Low ↑ +3 High High X Shift register data advanced one bit Latched Latched Low High High High X No effect Latched Latched ↑ +3 Low High High X No effect Selected DAC updated with current shift register contents4 Latched High X Low High X No effect Latched Transparent High X High High X No effect Latched Latched High X ↑ +3 High X No effect Latched Latched High X High Low 0 No effect Latched data = 0x0000 Latched data = 0x0000 High X High Low High No effect Latched data = 0x8000 Latched data = 0x8000 1 For the AD5544, data appears at the SDO pin 19 clock pulses after input at the SDI pin. 2 X means don’t care. 3 ↑ +is a positive logic transition. 4 At power-on, both the input register and the DAC register are loaded with all 0s. Table 9. AD55541 Control Logic Truth Table CS CLK LDAC RS MSB2 Serial Shift Register Function3 Input Register Function3 DAC Register High X High High X No effect Latched Latched Low L High High X No effect Latched Latched Low ↑ +3 High High X Shift register data advanced one bit Latched Latched Low High High High X No effect Latched Latched ↑ +3 Low High High X No effect Selected DAC updated with current shift register contents4 Latched High X Low High X No effect Latched Transparent High X High High X No effect Latched Latched High X ↑ +3 High X No effect Latched Latched High X High Low 0 No effect Latched data = 0x0000 Latched data = 0x0000 High X High Low High No effect Latched data = 0x2000 Latched data = 0x2000 1 For the AD5554, data appears at the SDO pin 17 clock pulses after input at the SDI pin. 2 X means don’t care. 3 ↑ +is a positive logic transition. 4 At power-on, both the input register and the DAC register are loaded with all 0s. |
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