AD9957SLASHPCBZ datasheet(18/61 Pages) AD

18 / 61 page

AD9957

Data Sheet

Rev. F | Page 18 of 61

BLACKFIN INTERFACE (BFI) MODE

A subset of the QDUC mode is the Blackfin interface (BFI)

mode, shown in Figure 27; grayed items are inactive. In this

mode, a separate I and Q serial bit stream is applied to the

baseband data port instead of parallel data-words. The two

serial inputs provide for 16-bit I- and Q-words (unlike the

18-bit words in normal QDUC mode). The serial bit streams

are delivered to the Blackfin interface. The Blackfin interface

converts the 16-bit serial data into 16-bit parallel data to

propagate down the signal processing chain.

The Blackfin interface includes an additional pair of half-band

filters in both I and Q signal paths (not shown explicitly in the

diagram). The two half-band filters increase the interpolation

of the baseband data by a factor of four, relative to the normal

QDUC mode.

The synchronization of the serial data occurs through the

PDCLK signal. In BFI mode, the PDCLK signal is effectively

the bit clock for the serial data.

Note that the system clock is limited to 750 MHz in BFI mode.

PDCLK

I/Q IN

DAC_RSET

IOUT

TxENABLE

DAC GAIN

CLOCK

SYSCLK

PLL

÷2

REF_CLK

REFCLK_OUT

XTAL_SEL

AD9957

cos (ωt+θ)

sin (ωt+θ)

DDS

AUX

DAC

8-BIT

POWER

DOWN

CONTROL

OSK

INTERNAL CLOCK TIMING AND CONTROL

DAC

14-BIT

FTW

PARALLEL DATA

TIMING AND CONTROL

RAM

SERIAL I/O

PORT

PROGRAMMING

REGISTERS

I Q

IS QS

OUTPUT

SCALE

FACTOR

Figure 27. Quadrature Modulation Mode, Blackfin Interface

AD9957/PCBZ bảng dữ liệu(PDF) 18 Page - Analog Devices

AD9957/PCBZ bảng dữ liệu(HTML) 18 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61

bảng dữ liệu tải về

Link URL