công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

LTC2000 bảng dữ liệu(PDF) 8 Page - Analog Devices

tên linh kiện LTC2000
Giải thích chi tiết về linh kiện  16-/14-/11-Bit 2.5Gsps DACs
PDF  54 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  AD [Analog Devices]
Trang chủ  http://www.analog.com
Logo AD - Analog Devices

LTC2000 bảng dữ liệu(HTML) 8 Page - Analog Devices

Back Button LTC2000 Datasheet HTML 4Page - Analog Devices LTC2000 Datasheet HTML 5Page - Analog Devices LTC2000 Datasheet HTML 6Page - Analog Devices LTC2000 Datasheet HTML 7Page - Analog Devices LTC2000 Datasheet HTML 8Page - Analog Devices LTC2000 Datasheet HTML 9Page - Analog Devices LTC2000 Datasheet HTML 10Page - Analog Devices LTC2000 Datasheet HTML 11Page - Analog Devices LTC2000 Datasheet HTML 12Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 54 page
background image
LTC2000
8
2000fb
For more information www.linear.com/LTC2000
The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. AVDD18, DVDD18 = 1.71V to 1.89V, AVDD33, DVDD33 = 3.135V to 3.465V, SVDD = 1.71V
to 3.465V, RFSADJ = 500Ω, output load 50Ω double terminated, unless otherwise specified.
TIMING CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
t1
SDI Valid to SCK Setup
(Note 3)
l
4
ns
t2
SDI Valid to SCK Hold
(Note 3)
l
4
ns
t3
SCK High Time
(Note 3)
l
9
ns
t4
SCK Low Time
(Note 3)
l
9
ns
t5
CS Pulse Width
(Note 3)
l
10
ns
t6
SCK High to CS High
(Note 3)
l
7
ns
t7
CS Low to SCK High
(Note 3)
l
7
ns
t10
CS High to SCK High
(Note 3)
l
7
ns
t13
SCK Low to SDO Valid
Unloaded (Note 3)
l
10
ns
SCK Frequency
50% Duty Cycle (Note 3)
l
50
MHz
t11
LVDS DAP/N, DBP/N to DCKI Setup Time
(Note 3)
DCKI_Q = 1
DCKI_Q = 0, DCKI_TADJ = 000
l
l
200
600
ps
ps
t12
LVDS DAP/N, DBP/N to DCKI Hold Time
(Note 3)
DCKI_Q = 1
DCKI_Q = 0, DCKI_TADJ = 000
l
l
200
–200
ps
ps
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltages are with respect to GND.
Note 3: Guaranteed by design and not production tested.
Note 4: Digital inputs at 0V or SVDD.
Note 5: Latency is the delay from a transition on DCKIP/N until the CKP/N
transition which causes the sample on DAP/N or DBP/N to appear at the
DAC output IOUTP/N, as measured in DAC sample clock (CKP/N) cycles.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com