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STV9936P/S
Electrical and Timing Characteristics
11.4
I²C Bus Characteristics
Table 48: Characteristics of the SDA an SCL bus lines for F/S-mode I²C-bus devices
Symbol
Parameter
Standard mode
Fast mode
Unit
Min.
Max.
Min.
Max.
I²C Interface: SDA and SCL
tSP
Pulse width of spikes which must be suppressed
by the input filter
n/a
n/a
0
50
ns
fSCL
SCL clock frequency
0
100
0
400
kHz
tHD;STA
Hold time (repeated) START Condition. After this
period, the first clock pulse is generated
4.0
0.6
µs
tLOW
LOW period of the SCL clock
4.7
1.3
µs
tHIGH
HIGH period of the SCL clock
4.0
0.6
µs
tSU; tSTA
Set-up time for a repeated START condition
4.7
0.6
µs
tHD;DAT
Data hold time
0
3.45
0
0.9
µs
tSU;DAT
Data set-up time
250
100
ns
tr
Rise time of both SCL and SDA signals
1000
20 + 0.1Cb
300
ns
tf
Fall time of both SCL and SDA signals
300
20 + 0.1Cb
300
ns
tSU; tSTO
Set-up time for STOP condition
4.0
0.6
µs
tBUF
Bus free time between a STOP and a START
condition
4.7
1.3
µs
Cb
Capacitive load for each bus line
400
400
pF
Figure 17: Definition of Timing for F/S-modes
handbook, full page width
S
Sr
tSU;STO
tSU;STA
tHD;STA
tHIGH
tLOW
tSU;DAT
tHD;DAT
tf
SDA
SCL
P
S
tBUF
tr
tf
tr
tSP
tHD;STA



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