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WM9714CLGEFL/V bảng dữ liệu(PDF) 1 Page - Cirrus Logic

tên linh kiện WM9714CLGEFL/V
Giải thích chi tiết về linh kiện  AC??7 Audio Codec
PDF  120 Pages
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nhà sản xuất  CIRRUS [Cirrus Logic]
Trang chủ  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM9714CLGEFL/V bảng dữ liệu(HTML) 1 Page - Cirrus Logic

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AC’97 Audio Codec
http://www.cirrus.com
Copyright
 Cirrus Logic, Inc., 2010–2016
(All Rights Reserved)
Rev 4.0
DEC ‘16
WM9714L
DESCRIPTION
The WM9714L is a highly integrated input/output device
designed for mobile computing and communications.
The chip is architected for dual CODEC operation, supporting hi-
fi stereo CODEC functions via the AC link interface, and
additionally supporting voice CODEC functions via a PCM type
Synchronous Serial Port (SSP). A third, auxiliary DAC is
provided which may be used to support generation of
supervisory tones, or ring-tones at different sample rates to the
main CODEC.
The device can connect directly to mono or stereo microphones,
stereo headphones and a stereo speaker, reducing total
component count in the system. Cap-less connections to the
headphones, speakers, and earpiece may be used, saving cost
and board area. Additionally, multiple analogue input and output
pins are provided for seamless integration with analogue
connected wireless communication devices.
All device functions are accessed and controlled through a
single AC-
Link interface compliant with the AC’97 standard. The
24.576 MHz master clock can be input directly or generated
internally from a 13MHz (or other frequency) clock by an on-chip
PLL.
The PLL supports a wide range of input clock from
2.048MHz to 78.6MHz.
The WM9714L operates at supply voltages from 1.8V to 3.6V.
Each section of the chip can be powered down under software
control to save power. The device is available in a small
leadless 7x7mm QFN package, ideal for use in hand-held
portable systems.
FEATURES
 AC’97 Rev 2.2 compatible stereo CODEC
- DAC SNR 94dB, THD
–85dB
- ADC SNR 87dB, THD
–86dB
- Variable Rate Audio, supports all WinCE sample rates
- Tone Control, Bass Boost and 3D Enhancement
 On-chip 45mW headphone driver
 On-chip 400mW mono or stereo speaker drivers
 Stereo, mono or differential microphone input
- Automatic Level Control (ALC)
- Mic insert and mic button press detection
 Auxiliary mono DAC (ring tone or DC level generation)
 Seamless interface to wireless chipset
 Additional PCM/I2S interface to support voice CODEC
 PLL derived audio clocks.
 Supports input clock ranging from 2.048MHz to 78.6MHz
 1.8V to 3.6V supplies (digital down to 1.62V, speaker up to
4.2V)
 7x7mm 48-lead QFN package
APPLICATIONS
 Smartphones
 Personal Digital Assistants (PDA)
 Handheld and Tablet Computers
BLOCK DIAGRAM
MONO
ALC /
NOISE
GATE
TONE /
BASS
BOOST
3D
MIC2A/COMP1/AUX1
MIC2B/COMP2/AUX2
LINER
LINEL
PCBEEP
ADCSEL
INTERRUPT
LOGIC
DCVDD
DBVDD
DGND2
HPVDD
HPGND
AC'97
INTERFACE
AUX
DAC
MONOIN
ADC
L
ADC
R
MICBIAS
VREF
AVDD
AVDD2
AGND
CAP2
50K
50K
VREF
DAC
L
DAC
R
HEADPHONE
MIXER
SPEAKER
MIXER
MONO
MIXER
AUX
ADC
INPUT PGAs
RECORD
SELECT
RECORD
VOLUME
DGND1
SPKVDD
SPKGND
AGND2
AGND3
MICCM
MIC1
-
DIFFERENTIAL
STEREO or
MONO MICS
PLL
PCM/I
2S
INTERFACE
VOICE
DAC
-
+
DEAD
BAT
LOW
BAT
+
-
VREF /
AUX4
Stereo
Speaker (R)
8R
Stereo
Speaker (L)
8R
HP
16/32R
Ear Speaker
32R
Hands-free
32R
HPL
HPR
SPKL
SPKR
OUT3
OUT4
SPKVDD / 3
WM9714L
POR
AVDD
DCVDD
RESETB
(pin 11)
rb
AUX4/GPIO8/
(SPDIF)


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