Document Number: 002-14815 Rev. *D

Page 39 of 49

PRELIMINARY

CYW20719

The specifications in Table 28 references Figure 11.

Reference

Characteristics

Minimum

Maximum

Unit

1

Clock frequency

–

100

kHz

400

800

1000

2

START condition setup time

650

–

ns

3

START condition hold time

280

–

ns

4

Clock low time

650

–

ns

5

Clock high time

280

–

ns

6

a. As a transmitter, 125 ns of delay is provided to bridge the undefined region of the falling edge of SCL to avoid unintended generation of START or STOP conditions.

0

–

ns

7

Data input setup time

100

–

ns

8

STOP condition setup time

280

–

ns

9

Output valid from clock

–

400

ns

10

b. Time that the CBUS must be free before a new transaction can start.

650

–

ns

2

8

SCL

SDA

IN

SDA

OUT

7

6

1

5

10

3

4

9