LED Control IC

W2RG012RN

7

Constant Voltage Drive

Current can be set individually for output terminals in 24 systems (OUT0R ~ 7R,/ OUT0G ~ 7G/OUT0B ~ 7B). To set current individually, resistance

is put in series relative to the LED to be lit. Current setting resistance terminal (REXTR/REXTG/REXTB) is connected to REXT resistance with

which current becomes higher than the operating current. The relationship between current and series resistance/REXT resistance is shown below.

Formula for Current Setting

I

Reset

When the input to reset terminal (RST) is L, all internal circuits are reset. Each buffer passes into the initial condition; the constant current output

terminal and the open drain output terminal into open output; and CMOS output terminal into L output. When the input is changed from L to H,

operation is resumed from the initial condition.

■ Communication Specifications

This IC can adapt to 4 communication modes. The communication mode is set with communication mode setting terminal (COM).

Serial Communication with Address (SP-D8 Mode)

Communication is started with a 9-bit start signal. Communication stability is enhanced by inserting a separator into data at intervals of 8 bits.

Serial Communication with Address (SP-D7 Mode)

Communication is started with an 8-bit start signal. Communication stability is enhanced by inserting a separator into data at intervals of 7 bits.

Serial Communication with Address (CE-D8 Mode)

The start and termination of communication is controlled with chip enabled signals. This communication mode is adapted to general-purpose serial

parallel interface.

The name and communication format of each communication mode are shown below.

Chip Enable

This IC has chip enable terminal (CE). If L is input as signal to the chip enable terminal, the chip becomes effective.

Communication data are received only when the chip is effective. If the chip becomes ineffective during communication, the IC interior passes into the wait condition,

and received communication data are ignored.

Serial Communication with Address (CE-D8)

The change of a chip enabled input signal means the start or termination of communication. If the chip passes from an effective condition (L input) into an ineffective

condition (H input), judgment is made that the communication has terminated, and the IC interior returns to the initial condition.

Name of communication mode

Abbreviation

Start Signal

Stop Signal

Separator

Data Width

Response

Serial communication with address (SP-D8 mode)

SP-D8

“1 1111 1111 0”

“1 1111 1111”

0: continuation

1: termination

8

ACK

(NACK)

Serial communication with address (SP-D7 mode)

SP-D7

“1111 1111 0”

“1111 1111”

0: continuation

1: termination

7

ACK

(NACK)

Serial communication with address (CE-D8 mode)

CE-D8

CE fall

CE rise

(None)

8

SYN

8

ACK

(NACK)

Start Signal:

Communication is initialized, whether in wait or communication, into the device selection data wait condition.

Stop Signal:

Communication is terminated, and passes into the start signal wait condition. In SP-D8/SP-D7, procedures to terminate communication

(transmitting “1” to separator/transmitting a stop signal) can be omitted by transmitting a start signal after transmitting gradation data.

Separator:

This bit is inserted into transmitted data. In SP-D8/SP-D7, communication is terminated by transmitting “1” to separator, and passes into the

Data Width:

Data width refers to the bit width of transmitted data. In SP-D7, data that can be designated are restricted (no word length designation, designation

of 128 gradations).

Response:

checked, and a result is returned (ACK or NACK). In CE-D8, a synchronization signal indicating in-communication status is output (SYN).

Received data are not checked.