19

HMC960LP4E

v01.1212

DC - 100 MHz DUAL DigitAL

VAriAbLe gAin AMpLifier with DriVer

For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824

978-250-3343 tel • 978-250-3373 fax • Order On-line at www.hittite.com

Application Support: apps@hittite.com

register Map

Three registers provide all the required functionality via the SPI port.

table 8. reg 01h - enable register

Bit

Name

Width

Default

Description

[0]

VGA_I_enable

1

1

VGA I channel enable bit

[1]

VGA_Q_enable

1

1

VGA Q channel enable bit

[2:3]

spare

2

0

[23:4]

unused

19

table 9. reg 02h - Settings register

Bit

Name

Width

Default

Description

[1:0]

opamp_bias[1:0]

2

01

Opamp bias setting.

00 -- min bias

11 -- max bias

opamp_bias[1:0]=01 recommended for low frequency operation or 10 for

improved linearity for higher frequency operation.

[3:2]

drvr_bias[1:0]

2

01

Driver bias setting.

00 -- min bias

11 -- max bias

drvr_bias[1:0]=10 recommended (characterized on recommended setting

only)

[4]

Rin_50ohm_select

1

1

Input impedance setting:

0: Rin of 200 ohms selected

1: Rin of 50 ohms selected

[5]

Gain_Control_from_SPI

1

0

Source of Gain Control Input

0: Gain control taken from parallel port (pins)

1: Gain control taken from SPI register 3

[6]

Gain_Decode_Disable

1

0

Bypass gain decoder

0: Decoded gain taken from register 3, bits <8:0>

1: Undecoded gain taken from register 3, bits <8:0>

(SPI gain control must be selected)

[7]

Gain_Deglitching_Disable

1

0

Bypass gain deglitcher

0: Gain control deglitching active

1: Gain control deglitching disabled

(applies to SPI and parallel port gain control)

[23:8]

unused

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