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IMX6SLLCEC bảng dữ liệu(PDF) 1 Page - NXP Semiconductors |
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IMX6SLLCEC bảng dữ liệu(HTML) 1 Page - NXP Semiconductors |
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1 / 90 page  NXP Semiconductors Data Sheet: Technical Data Document Number: IMX6SLLCEC Rev. 0.2, 11/2017 Ordering Information See Table 1 on page 2 © 2017 NXP B.V. MCIMX6V7DVN10AB Package Information Plastic Package 13 x 13 mm, 0.5 mm pitch BGA 1 Introduction The i.MX 6SLL processor represents NXP’s latest achievement in integrated multimedia applications processors, which are part of a growing family of multimedia-focused products that offer high performance processing and are optimized for lowest power consumption. The processor features NXP’s advanced implementation of a single Arm® Cortex®-A9, which operates at speeds up to 1 GHz. The processor provides a 32-bit DDR interface that supports LPDDR2 and LPDDR3. In addition, there are a number of other interfaces for connecting peripherals, such as WLAN, Bluetooth™, GPS, hard drive, displays, and camera sensors. The i.MX 6SLL processor is specifically useful for applications, such as: • Color and monochrome eReaders • Barcode scanners • Connectivity • IoT devices i.MX 6SLL Applications Processors for Consumer Products 1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 2 1.2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2. Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3. Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1. Special Signal Considerations . . . . . . . . . . . . . . . 11 3.2. Recommended Connections for Unused Analog Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 15 4.1. Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . 15 4.2. Power Supplies Requirements and Restrictions . 23 4.3. Integrated LDO Voltage Regulator Parameters . . 24 4.4. PLL’s Electrical Characteristics . . . . . . . . . . . . . . . 25 4.5. On-Chip Oscillators . . . . . . . . . . . . . . . . . . . . . . . 26 4.6. I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 27 4.7. I/O AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 31 4.8. Output Buffer Impedance Parameters . . . . . . . . . 33 4.9. System Modules Timing . . . . . . . . . . . . . . . . . . . . 36 4.10. External Peripheral Interface Parameters . . . . . . . 39 5. Boot Mode Configuration . . . . . . . . . . . . . . . . . . . . . . . . 65 5.1. Boot Mode Configuration Pins . . . . . . . . . . . . . . . 65 5.2. Boot Devices Interfaces Allocation . . . . . . . . . . . . 66 6. Package Information and Contact Assignments . . . . . . 67 6.1. 13 x 13 mm Package Information . . . . . . . . . . . . . 67 7. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 |
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