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CMV2000 bảng dữ liệu(PDF) 24 Page - ams AG |
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CMV2000 bảng dữ liệu(HTML) 24 Page - ams AG |
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24 / 64 page ![]() Reference: CMV2000-datasheet-v3.8 CMV2000 v3 Datasheet Page 23 of 63 © 2015 CMOSIS bvba 4.3.2 12 BIT MODE In 12 bit mode, the analog-to-digital conversion takes 4x longer to complete. This causes the frame rate to drop to 70FPS when 40MHz is used for CLK_IN. Due to this extra conversion time, the sensor automatically multiplexes to 4 outputs when 12 bit is used. To simplify the figures below, the timing for only one LVDS channel is shown in every case. 4.3.2.1 4 OUTPUT CHANNELS By default, the CMV2000 uses only 4 LVDS output channels in 12 bit mode. This means that the read-out of one row takes (4 x 128) + (4 x 1) master clock periods. IDLE OH 128 OH DATA_OUT 128 OH 128 OH 128 Row 1 Row 2 OH 128 OH 128 OH 128 OH 128 FIGURE 24: OUTPUT TIMING IN OF 4 CHANNEL MODE 4.3.2.2 2 OUTPUT CHANNELS When only 2 LVDS output channels are used, the read-out of one row takes (8*128) + (8*1) master clock periods. The maximum frame rate is reduced with a factor of 2 compared to 4-channel mode. IDLE OH 128 128 128 128 128 Row 1 128 128 128 128 128 128 128 128 Row 2 128 128 128 OH OH OH OH OH OH OH OH OH OH OH OH OH OH OH FIGURE 25: OUTPUT TIMING IN 2 CHANNEL MODE 4.4 PIXEL REMAPPING Depending on the number of output channels, the pixels are read out by different channels and come out at a different moment in time. With the details from the next chapters, the end user is able to remap the pixel values at the output to their correct image array location. 4.4.1 16 OUTPUTS Figure 26 shows the location of the image pixels versus the output channel of the image sensor. IDLE Pixel 0 to 127 Channel 1 IDLE Pixel 128 to 255 Channel 2 IDLE Pixel 256 to 383 Channel 3 IDLE Pixel 1792 to 1919 Channel 15 IDLE Pixel 1920 to 2047 Channel 16 Row 1 Pixel 0 to 127 Row 2 Pixel 128 to 255 Pixel 256 to 383 Pixel 1792 to 1919 Pixel 1920 to 2047 FIGURE 26: PIXEL REMAPPING FOR 16 OUTPUT CHANNELS 16 bursts of 128 pixels happen in parallel on the data outputs. This means that one complete row is read out in one burst. The amount of rows that will be read out depends on the value in the corresponding register. By default there are 1088 rows being read out. |
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