LTM4651 datasheet(8/34 Pages) LINER

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LTM4651

4651f

For more information www.linear.com/LTM4651

PIN FUNCTIONS

VIN (A1 – A3, B3): Power Input Pins. Apply input voltage

and input decoupling capacitance directly between VIN

and a power ground (PGND) plane.

VD(A4,B4,C4):DrainoftheConverter’sPrimarySwitching

MOSFET. Apply at least one 4.7μF high frequency ceramic

decoupling capacitor directly from VD to VOUT–. Give this

capacitor higher layout priority (closer proximity to the

module) than any VIN decoupling capacitors.

SVIN(C3): Input Voltage Supply for Small-Signal Circuits.

SVIN is the input to the INTVCC LDO. Connect SVIN directly

to VIN. No decoupling capacitor is needed on this pin.

VOUT– (A5, B5, C2, C5, D5, E5, F5, G4 – 5, H3, H5,

J3 – 5, K4 – 5, L4 – 5): Negative Power Output of the

LTM4651. Connect all VOUT– pins to the application’s

VOUT– plane. Apply the output filter capacitor and the

output load between these and the PGND pins.

PGND(K1–3,L1–3):PowerGroundPinsoftheLTM4651.

Electricallyconnectallpinstotheapplication’sPGNDplane.

GND(D4):GroundReferenceforRUN,CLKIN,andPGOOD

Signals. Connect GND directly to the PGND power ground

plane.

GNDSNS (G1, H1): Voltage Sense, PGND Input and Feed-

back Signal. Connect GNDSNS to PGND at the point of

load (POL). Pins G1 and H1 are electronically connected

to each other internal to the module, and thus it is only

necessary to connect one GNDSNSpintoPGNDatthePOL.

The remaining GNDSNSpincanbeusedforredundantcon-

nectivity or routed to an ICT test point for design-for-test

considerations, as desired.

SVOUT–(E4,G2,H2):VoltageSense,VOUT–Input.Connect

Pin H2 to VOUT– directly under the LTM4651. The SVOUT–

pins at locations E4 and G2 are electrically connected

to each other internal to the module, and thus it is only

necessary to connect one SVOUT– pin to VOUT– under

the module. The remaining SVOUT– pins can be used for

redundant connectivity or routed to an ICT test point for

design-for-test considerations, as desired.

RUN (F4): Run Control Pin. A voltage above 1.2V (with

respect to GND) commands the module to regulate its

output voltage. Undervoltage lockout (UVLO) can be

implemented by connecting RUN to the midpoint node

formed by a resistor-divider between VIN and GND. RUN

features 130mV of hysteresis. See the Applications In-

formation section.

INTVCC (G3): Internal Regulator, 3.3V Output with Re-

spect to VOUT–. Internal control circuits and MOSFET-

drivers derive power from INTVCC bias. When operating

3.6V < SVIN ≤ 58V, an LDO generates INTVCC from SVIN

whenRUNislogichigh(RUN>1.2V).Noexternaldecoupling

is required. When RUN is logic low (RUN – GND < 1.2V),

the INTVCC LDO is off, i.e., INTVCC is unregulated. (Also

see EXTVCC.) It is not recommended to load INTVCC with

external circuits exceeding ~10mA. See the Applications

Information section and Note 8.

EXTVCC (F3): External Bias, Auxiliary Input to the INTVCC

Regulator. When EXTVCC – VOUT– exceeds 3.2V and

SVIN – VOUT– exceeds 5V, the INTVCC LDO derives power

from EXTVCC bias instead of the SVIN path. This technique

can reduce LDO losses considerably, resulting in a cor-

responding reduction in module junction temperature. For

applications where |VOUT–| > 4V, realize this benefit by

connecting EXTVCC to PGND through a resistor. (See the

Application Information section for resistor value.) When

taking advantage of this EXTVCC feature, locally decouple

EXTVCCtoVOUT–witha1µFceramiccapacitor—otherwise,

leave EXTVCC open circuit.

ISETb (F1): 1.5nF Soft-Start Capacitor. Connect ISETb

to ISETa to achieve default soft-start characteristics, if

desired—otherwise, leave ISETb open circuit. See ISETa.

ISETa (F2): Accurate 50µA Current Source. Positive input

to the error amplifier. Connect a resistor (RSET) from this

pintoSVOUT–toprogramthedesiredLTM4651outputvolt-

age, VOUT– = –RSET • 50µA. A capacitor can be connected

from ISETa to SVOUT– to soft-start the output voltage and

reduce start-up inrush current. Connect ISETa to ISETb in

order to achieve default soft-start, if desired. See ISETb.

PACKAGE ROW AND COLUMN LABELING MAY VARY

AMONG µModule PRODUCTS. REVIEW EACH PACKAGE

LAYOUT CAREFULLY.

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