FDMF6823C datasheet(16/21 Pages) ONSEMI

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FDMF6823C • Rev. 1.0.3

Application Information

Supply Capacitor Selection

For the supply inputs (VCIN), a local ceramic bypass

capacitor is recommended to reduce noise and to

supply the peak current. Use at least a 1 µF X7R or X5R

capacitor. Keep this capacitor close to the VCIN pin and

connect it to the GND plane with vias.

Bootstrap Circuit

The bootstrap circuit uses a charge storage capacitor

(CBOOT), as shown in Figure 30. A bootstrap capacitance

of 100 nF X7R or X5R capacitor is usually adequate. A

series bootstrap resistor may be needed for specific

applications to improve switching noise immunity. The

boot resistor may be required when operating above

15 VIN and is effective at controlling the high-side

MOSFET turn-on slew rate and VSHW overshoot. RBOOT

values from 0.5 to 3.0

Ω are typically effective in

reducing VSWH overshoot.

VCIN Filter

The VDRV pin provides power to the gate drive of the

high-side and low-side power MOSFET. In most cases,

it can be connected directly to VCIN, the pin that

provides power to the logic section of the driver. For

additional noise immunity, an RC filter can be inserted

between the VDRV and VCIN pins. Recommended

values would be 10

Ω and 1 µF.

Power Loss and Efficiency

Measurement and Calculation

Refer to Figure 30 for power loss testing method.

Power loss calculations are:

PIN=(VIN x IIN) + (V5V x I5V) (W)

(1)

PSW=VSW x IOUT (W)

(2)

POUT=VOUT x IOUT (W)

(3)

PLOSS_MODULE=PIN - PSW (W)

(4)

PLOSS_BOARD=PIN - POUT (W)

(5)

EFFMODULE=100 x PSW/PIN (%)

(6)

EFFBOARD=100 x POUT/PIN (%)

(7)

Figure 29.

Block Diagram With VCIN Filter

Figure 30.

Power Loss Measurement

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