MP2935 datasheet(12/42 Pages) MPS

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MP2935 — 4-PHASE PWM CONTROLLER FOR VR12.5 APPLICATIONS

MP2935 Rev. 1.02

www.MonolithicPower.com

8/25/2015

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

OPERATION

MP2935

4-phase

VR12.5-compliant

controller for Intel microprocessors. It is a

multiphase controller for up to 4-phase operation

and is capable for multi-mode PWM/advanced

asynchronous

mode

(AAM)

operation

maximize the efficiency over the load range. It

includes blocks for a precision DAC, remote

voltage-sense amplifiers, an error amplifier, a

ramp generator with input voltage feed-forward, a

PWM comparator, AAM control, load-line set, a

VR-ready (VRRDY) monitor, a temperature

monitor and serial VID (SVID) registers. It also

includes dynamic-phase current balancing and

phase shedding. Protection features include

under-voltage

lockout

(UVLO),

over-current

protection (OCP), over-voltage protection (OVP),

under-voltage protection (UVP) and reverse

voltage protection (RVP).

PWM Operation

MP2935

uses

constant-switching–frequency

current mode control and trailing-edge PWM

operation with injected valley current signals. The

PWM ramp of each phase combines with the

sensed valley current to determine phase-current

balance. Figure 1 shows the operation principles.

The phase clock turns the PWM on. When the

combined ramp voltage hits VCOMP voltage the

PWM turns off. The phase shift is applied

between operating phases to minimize the input

and output current ripple.

In general, the controller needs to wait for the

next clock during a load step transient to turn on

the PWM to support the load current. The waiting

time causes the extra output voltage to drop. To

maximize the current support to reduce the

output voltage drop during the transient load,

MP2935

employs

FAST-PWMTM

mode

respond immediately. During the load-step

transient, the output voltage drop causes VCOMP

to rise. When VCOMP rise fast enough to trigger

the

FAST-PWM

threshold,

the

controller

overrides the phase clock and turns on all PWMs

without phase shifts. The PWM OFF of each

phase is the same as for normal operation when

the combined ramp hits VCOMP voltage. This

FAST-PWM mode maximizes the regulator’s di/dt

slew rate to support the output load transient step

and minimize the VOUT drop.

When the power state is not PS0, the chip

operates in single phase with AAM mode to

maximize the efficiency in light load condition. A

detailed description of AAM mode operation is

described in “AAM Control Operation and Diode

Emulation.”

Figure 1: Block Diagram of PWM Operation

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